IBM Intel Xeon E5504 46M1078 User Manual
Product codes
46M1078
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
97
Register Description
6:4
RW
0
tddRdTRd. Minimum delay between reads to different DIMMs.
000: 2
001: 3
010: 4
011: 5
100: 6
101: 7
110: 8
111: 9
000: 2
001: 3
010: 4
011: 5
100: 6
101: 7
110: 8
111: 9
3:1
RW
0
tdrRdTRd. Minimum delay between reads to different ranks on the same
DIMM.
000: 2
001: 3
010: 4
011: 5
100: 6
101: 7
110: 8
111: 9
000: 2
001: 3
010: 4
011: 5
100: 6
101: 7
110: 8
111: 9
0
RW
0
tsrRdTRd. Minimum delay between reads to the same rank.
0: 4
1: 6
0: 4
1: 6
Device:
4, 5, 6
Function: 0
Offset:
80h
Access as a Dword
Bit
Type
Reset
Value
Description