Intel C2D Mobile T5800 LF80537GG041F User Manual
Product codes
LF80537GG041F
Datasheet
9
Introduction
1.2
References
Material and concepts available in the following documents may be beneficial when
reading this document.
Execute Disable
Bit
Bit
The Execute Disable bit allows memory to be marked as executable or non-
executable, when combined with a supporting operating system. If code
attempts to run in non-executable memory the processor raises an error to
the operating system. This feature can prevent some classes of viruses or
worms that exploit buffer overrun vulnerabilities and can thus help improve
the overall security of the system. See the Intel® 64 and IA-32
Architectures Software Developer's Manuals for more detailed information.
executable, when combined with a supporting operating system. If code
attempts to run in non-executable memory the processor raises an error to
the operating system. This feature can prevent some classes of viruses or
worms that exploit buffer overrun vulnerabilities and can thus help improve
the overall security of the system. See the Intel® 64 and IA-32
Architectures Software Developer's Manuals for more detailed information.
Intel® 64
Technology
Technology
64-bit memory extensions to the IA-32 architecture.
Intel®
Virtualization
Technology
Virtualization
Technology
Processor virtualization that, when used in conjunction with Virtual Machine
Monitor software, enables multiple, robust independent software
environments inside a single platform.
Monitor software, enables multiple, robust independent software
environments inside a single platform.
Half ratio support
(N/2) for Core to
Bus ratio
(N/2) for Core to
Bus ratio
Intel Core 2 Duo processors and Intel Core 2 Extreme processors support
the N/2 feature that allows having fractional core-to-bus ratios. This feature
provides the flexibility of having more frequency options and being able to
have products with smaller frequency steps.
the N/2 feature that allows having fractional core-to-bus ratios. This feature
provides the flexibility of having more frequency options and being able to
have products with smaller frequency steps.
TDP
Thermal Design Power.
V
CC
The processor core power supply.
V
SS
The processor ground.
LV
Low-voltage
ULV
Ultra-Low-Voltage
DC-XE
Dual-core Extreme Edition
Term
Definition
Document
Document
Number
Intel® Core™2 Duo Mobile Processor, Intel® Core™2 Solo Mobile
Processor, Intel® Core™2 Extreme Processor on 45-nm Technology
Specification Update
Processor, Intel® Core™2 Extreme Processor on 45-nm Technology
Specification Update
320121
Mobile Intel® 4 Series Express Chipset Family Datasheet
320122
Mobile Intel® 4 Series Express Chipset Family Specification Update
320123
Intel® I/O Controller Hub 9 (ICH9)/ I/O Controller Hub 9M (ICH9M)
Datasheet
Datasheet
316972
Intel® I/O Controller Hub 9 (ICH9)/ I/O Controller Hub 9M (ICH9M)
Specification Update
Specification Update
316973
Intel® 64 and IA-32 Architectures Software Developer's Manuals
Volume 1: Basic Architecture
253665
Volume 2A: Instruction Set Reference, A-M
253666