Intel Xeon® Processor X3430 (8M Cache, 2.40 GHz) BX80605X3430 User Manual
Product codes
BX80605X3430
Processor Integrated I/O (IIO) Configuration Registers
134
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
3.4.7.4
CTSTS—Throttling Status Register
3.4.7.5
CTCTRL—Throttling Control Register
3.5
Intel
®
VT-d Memory Mapped Registers
Intel
VT-d registers are all addressed using aligned DWord or aligned QWord accesses.
Any combination of bits is allowed within a DWord or QWord access. The Intel VT-d
remap engine registers corresponding to the non-Isochronous port represented by
Device 0, occupy the first 4 K of offset starting from the base address defined by
VTBAR register. The Intel VT-d Isochronous remap engine registers occupies the second
4 K of offset starting from the base address.
remap engine registers corresponding to the non-Isochronous port represented by
Device 0, occupy the first 4 K of offset starting from the base address defined by
VTBAR register. The Intel VT-d Isochronous remap engine registers occupies the second
4 K of offset starting from the base address.
Register:
CTSTS
Device:
8
Function: 3
Offset:
F4h
Bit
Attr
Default
Description
7:2
RV
00h
Reserved
1
RW1CS
0
Integrated I/O Throttling Event
This bit is asserted when a high temperature situation is signalled from the
This bit is asserted when a high temperature situation is signalled from the
Processor uncore logic, and reset when deasserted.
0
RV
0
Reserved
Register:
CTCTRL
Device:
8
Function: 3
Offset:
F7h
Bit
Attr
Default
Description
7:4
RV
00h
Reserved
3
RW
1h
This bit when set enables Force L0s on Tx links on PCI Express when an
Integrated I/O (IIO) throttling event is signalled.
If unset, this feature is de-featured.
If unset, this feature is de-featured.
2
RW
1h
When this bit is set, throttling of Integrated I/O Intel
QuickPath Interconnect
occurs, when an Integrated I/O (IIO) throttling event is signalled.
If not set, this feature is de-featured.
If not set, this feature is de-featured.
1
RV
0h
Reserved
0
RV
0
Reserved
Figure 3-2. Base Address of Intel
®
VT-d Remap Engines
Non-Isoch VT-d
Isoch VT-d
VT_BAR
VT_BAR + 8KB Total
VT_BAR + 4KB