Intel Xeon® Processor X3430 (8M Cache, 2.40 GHz) BX80605X3430 User Manual
Product codes
BX80605X3430
Processor Uncore Configuration Registers
248
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
4.10.20 MC_CHANNEL_0_ODT_MATRIX_RANK_4_7_RD
MC_CHANNEL_1_ODT_MATRIX_RANK_4_7_RD
This register contains the ODT activation matrix for RANKS 4 to 7 for Reads.
4.10.21 MC_CHANNEL_0_ODT_MATRIX_RANK_0_3_WR
MC_CHANNEL_1_ODT_MATRIX_RANK_0_3_WR
This register contains the ODT activation matrix for RANKS 0 to 3 for Writes.
4.10.22 MC_CHANNEL_0_ODT_MATRIX_RANK_4_7_WR
MC_CHANNEL_1_ODT_MATRIX_RANK_4_7_WR
This register contains the ODT activation matrix for RANKS 4 to 7 for Writes.
Device:
4, 5
Function:)0
Offset:
A8h
Access as a DWord
Bit
Attr
Default
Description
31:24
RW
1
ODT_RD3. ODT values for all 8 Ranks when reading Rank 7.
23:16
RW
1
ODT_RD2. ODT values for all 8 Ranks when reading Rank 6.
15:8
RW
4
ODT_RD1. ODT values for all 8 Ranks when reading Rank 5.
7:0
RW
4
ODT_RD0. ODT values for all 8 Ranks when reading Rank 4.
Device:
4, 5
Function: 0
Offset:
ACh
Access as a DWord
Bit
Attr
Default
Description
31:24
RW
9
ODT_WR3. ODT values for all 4 Ranks when writing to Rank 3.
23:16
RW
5
ODT_WR2. ODT values for all 4 Ranks when writing to Rank 2.
15:8
RW
6
ODT_WR1. ODT values for all 4 Ranks when writing to Rank 1.
7:0
RW
5
ODT_WR0. ODT values for all 4 Ranks when writing to Rank 0.
Device:
4, 5
Function: 0
Offset:
B0h
Access as a DWord
Bit
Attr
Default
Description
31:24
RW
9
ODT_WR7. ODT values for all 4 ranks when writing to Rank7.
23:16
RW
5
ODT_WR6. ODT values for all 4 ranks when writing to Rank6.
15:8
RW
6
ODT_WR5. ODT values for all 4 ranks when writing to Rank5.
7:0
RW
5
ODT_WR4. ODT values for all 4 ranks when writing to Rank4.