Intel Xeon® Processor X3430 (8M Cache, 2.40 GHz) BX80605X3430 User Manual
Product codes
BX80605X3430
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
97
Processor Integrated I/O (IIO) Configuration Registers
3.4.2
Standard PCI Configuration Registers
3.4.2.1
VID—Vendor Identification Register
Read only Vendor ID (Intel) value.
3.4.2.2
DID—Device Identification Register
3.4.2.3
PCICMD—PCI Command Register
This register defines the PCI 3.0 compatible command register values applicable to PCI
Express space.
Express space.
Register: VID
Device:
8
Function: 0-3
Offset:
00h
Bit
Attr
Default
Description
15:0
RO
8086h
Vendor Identification Number (VID)
PCI Standard Identification for Intel.
PCI Standard Identification for Intel.
Register: DID
Device:
8
Function: 0-3
Offset:
02h
Bit
Attr
Default
Description
15:0
RO
D155h (F:0)
D156h (F:1)
D157h (F:2)
D158h (F:3)
D156h (F:1)
D157h (F:2)
D158h (F:3)
Device Identification Number
Identifier assigned to the product. Integrated I/O will have a unique
Identifier assigned to the product. Integrated I/O will have a unique
device id for each device.
The value is assigned by Intel to each product. Integrated
The value is assigned by Intel to each product. Integrated
I/O will have a unique device ID for each of its single function devices
and a unique device ID for each function in the multi-function devices.
(Sheet 1 of 3)
Register: PCICMD
Device:
8
Function: 0-3
Offset:
04h
Bit
Attr
Default
Description
15:11
RV
00h
Reserved
10
RO
0
INTDIS: Interrupt Disable
This bit does not affect the ability of the Express port to route interrupt
This bit does not affect the ability of the Express port to route interrupt
messages received at the PCI Express* port.
0 = Legacy Interrupt message generation is enabled.
0 = Legacy Interrupt message generation is enabled.
1 = Legacy Interrupt message generation is disabled.
9
RO
0
Fast Back-to-Back Enable
Not applicable to PCI Express and is hardwired to 0.
Not applicable to PCI Express and is hardwired to 0.