Motorola MPC8260 User Manual

MOTOROLA

Chapter 4.  System Interface Unit (SIU)  

4-17

The SIU registers are grouped into the following three categories:

¥

Interrupt controller registers. These registers control conÞguration, prioritization, 
and masking of interrupts. They also include registers for determining the interrupt 
sources. These registers are described in Section 4.3.1, ÒInterrupt Controller 
Registers.Ó

¥

System conÞguration and protection registers. These include registers for 
conÞguring the SIU, deÞning the base address for the internal memory map, 
conÞguring the watchdog timer, specifying bus characteristics, as well as general 
functionality of the 60x, and local buses such as arbitration, error status, and control. 
These registers are described in Section 4.3.2, ÒSystem ConÞguration and 
Protection Registers.Ó

¥

Periodic interrupt registers. These include registers for conÞguring and providing 
status for periodic interrupts. See Section 4.3.3, ÒPeriodic Interrupt Registers.Ó

There are seven interrupt controller registers, described in the following sections:

¥

¥

¥

¥

¥

¥

¥

The SIU interrupt conÞguration register (SICR), shown in Figure 4-10, deÞnes the highest
priority interrupt and whether interrupts are grouped or spread in the priority table,
Table 4-2. 

Bits

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Field

Ñ

HP

Ñ

GSIU

SPS

Reset

0000_0000_0000_0000

R/W

R/W

Addr