Motorola MPC8260 User Manual

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MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV.  Communications Processor Module
Reception starts when the PHY asserts the receive cell available signal (RxCLAV) to
indicate that the PHY has a complete cell in its receive FIFO. The receiver reads a complete
cell from the UTOPIA interface and translates the header address (VP/VC) to a channel
code by performing an address look-up. If no matches are found, the cell is discarded and
the user-network interface (UNI) statistics tables are updated. The receiver uses the channel
code to read the channel parameters from the receive connection table (RCT).
29.2.2.1  AAL5 Receiver Overview
The receiver copies the 48-byte cell payload to the external buffer and calculates CRC-32
on the entire CPCS-PDU. When the last AAL5 cell arrives, the receiver checks the length,
CRC-32, and CPCS-UU+CPI Þelds and sets the corresponding RxBD status bits. An
interrupt may be generated to one of the four interrupt queues. The receiver copies the last
cell to memory including the padding and the AAL5 trailer. The CPCS-UU+CPI (16-bit
entry) may be read directly from the AAL5 trailer.
The ATM controller monitors the CLP and CNG state of the incoming cells. When the
message is closed, these events set RxBD[CLP] and RxBD[CNG]. 
When no buffer is ready to receive cells (busy state), the receiver switches to hunt state and
drops all cells associated with the current frame (partial packet discard). The receiver tries
to open new buffers for cell reception only after the last cell of the discarded AAL5 frame
arrives.
29.2.2.2  AAL1 Receiver Overview
The ATM controller supports both AAL1 structured and unstructured formats. For the
unstructured format, 47 octets are copied to the current receive buffer. The AAL1 PDU
header, which consists of the sequence number (SN) and the sequence number protection
(SNP) (CRC-3 and parity bit), is checked. The MPC8260 supports SRTS clock recovery
using an external PLL. In this mode, the MPC8260 tracks the SRTS from the four incoming
cells and writes the SRTS code to external logic. See Section 29.15, ÒSRTS Generation and
Clock Recovery Using External Logic.
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In the unstructured format, when the receive process begins, the receiver hunts for the Þrst
cell with a valid sequence number (SN Þeld). When one arrives, the receiver leaves the hunt
state and starts receiving. If an SN mismatch is detected, the receiver closes the RxBD, sets
RxBD[SNE], and switches to hunt state, where it stays until a cell with a valid SN Þeld is
received. 
For the structured format, 47 or 46 octets are copied to the current receive buffer. The AAL1
PDU header, which consists of SN and SNP, is checked and the PDU status is written to the
BD.
In the structured format, when the receive process begins, the receiver hunts for the Þrst cell
with a valid structured pointer to gain synchronization. When one arrives, the receiver
leaves the hunt state and starts receiving. Then the receiver opens a new buffer. The
structured pointer points to the Þrst octet of the structured block, which then becomes the