Motorola MPC8260 User Manual
29-8
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV. Communications Processor Module
Þrst byte of the new buffer. If an SN mismatch is detected, the ATM receiver closes the
current RxBD, sets RxBD[SNE], and returns to the hunt state. The receiver then waits for
a cell with a valid structured pointer to regain synchronization.
current RxBD, sets RxBD[SNE], and returns to the hunt state. The receiver then waits for
a cell with a valid structured pointer to regain synchronization.
The MPC8260 supports partially Þlled cells conÞgured on a per-VC basis. In this mode, the
ATM controller copies only the valid octets from the cell user data Þeld to the buffer.
ATM controller copies only the valid octets from the cell user data Þeld to the buffer.
29.2.2.3 AAL0 Receiver Overview
For AAL0, no speciÞc adaptation layer processing is done. The ATM controller copies the
whole cell to an external buffer. Each buffer contains exactly one AAL0 cell. The ATM
controller calculates and checks the CRC10 of the cell payload and sets RxBD[CRE] if a
CRC error occurs. AAL0 mode can be useful for receiving OAM cells or AAL3/4 raw cells.
whole cell to an external buffer. Each buffer contains exactly one AAL0 cell. The ATM
controller calculates and checks the CRC10 of the cell payload and sets RxBD[CRE] if a
CRC error occurs. AAL0 mode can be useful for receiving OAM cells or AAL3/4 raw cells.
29.2.3 Performance Monitoring
The ATM controller supports performance monitoring testing according to ITU I.610.
When performance monitoring is enabled, the ATM controller automatically generates and
terminates FMCs (forward monitoring cells) and BRCs (backward reporting cells). See
Section 29.6.6, ÒPerformance Monitoring.Ó
When performance monitoring is enabled, the ATM controller automatically generates and
terminates FMCs (forward monitoring cells) and BRCs (backward reporting cells). See
Section 29.6.6, ÒPerformance Monitoring.Ó
29.2.4 ABR Flow Control
When AAL5-ABR is enabled, the ATM controller implements the ATM Forum TM 4.0
available-bit-rate ßow. It automatically inserts forward- and backward-RM cells into the
user cells stream and adjusts the transmission rate according to the backwards RM cell
feedback; see Section 29.10.2.2.2, ÒAAL5-ABR Protocol-SpeciÞc RCT.Ó The ABR ßow is
controlled on a per-VC basis.
available-bit-rate ßow. It automatically inserts forward- and backward-RM cells into the
user cells stream and adjusts the transmission rate according to the backwards RM cell
feedback; see Section 29.10.2.2.2, ÒAAL5-ABR Protocol-SpeciÞc RCT.Ó The ABR ßow is
controlled on a per-VC basis.
29.3 ATM Pace Control (APC) Unit
The ATM pace control (APC) unit schedules the ATM channels for transmitting. While
performing this task, the APC unit uses the following parameters:
performing this task, the APC unit uses the following parameters:
¥
Frequency (bandwidth) of each ATM channel
¥
ATM trafÞc pacingÑPeak cell rate (PCR), sustain cell rate (SCR), and minimum
rate (MCR)
rate (MCR)
¥
Priority levelÑReal-time channels (CBR or VBR-RT) are scheduled at high-priority
levels; non-real-time channels (VBR-NRT, ABR, UBR) are scheduled at low-
priority levels. Up to eight priority levels are available.
levels; non-real-time channels (VBR-NRT, ABR, UBR) are scheduled at low-
priority levels. Up to eight priority levels are available.
29.3.1 APC Modes and ATM Service Types
The ATM Forum (http://www.atmforum.com) deÞnes the service types described in
Table 29-1.
Table 29-1.