Motorola MPC8260 User Manual

29-17

MOTOROLA

The size of the VP-level table depends on the number of mask bits in VP_MASK. For
example, if only one PHY is available (PHY address = 0) and VPMASK =
0b11_1111_1111, VP pointer contains ten bits and the table is 4 Kbytes. Because each
VPLT entry is 4 bytes, the address of an entry is VPT_BASE + VP pointer 

´ 4.

Each VPLT entry has two parameters:

¥

VC_MASKÑA 16-bit VC-level mask for masking the incoming cellÕs VCI 

¥

VCOFFSETÑA 16-bit VC-level table offset from VC_BASE that points to the 
appropriate VC-level tableÕs (VCLT) starting address. The address of the VCLT is 
VC_BASE + VCOFFSET 

´ 4.

If the VCLTs are to be placed contiguously in memory, each tableÕs VCOFFSET 
depends on the size of preceding tables. Each tableÕs size depends on the number of 
ones in VC_MASK. Figure 29-6 gives the general formula for determining 
VCOFFSET.

Table 29-4 shows example VCOFFSET calculations for a VP-level table with four 
entries. 

The MPC8260 can check that all unallocated bits of the PHY + VPI are 0 by setting
GMODE[CUAB] (check unallocated bits) in the parameter RAM. If they are not, the cell
is considered a misinserted cell.

Table 29-5 gives an example of VP-level table entry address calculation. 

General formula: VCOFFSET

(n+1)

 = VCOFFSET

n

 + 2

(number of ones in VC_MASKn)

0

0x0237

6

2

6

 = 64 entries

0

1

0x0230

3

2

3

 = 8 entries

64

2

0xA007

5

2

5

 = 32 entries

64 + 8 = 72

3

x

x

x

72 + 32 = 104

0x0024_0000

64 entries

0x0237

0x0011

0x09

VP Base = 0x240000

0x09 x 4 = 0x000024

0x240024