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Motorola MPC8260 User Manual

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MOTOROLA
Appendix A. Register Quick Reference Guide  
A-1
Appendix A
Register Quick Reference Guide
A0
A0
This section provides a brief guide to the core registers.
A.1  PowerPC RegistersÑUser Registers
The  implements the user-level registers deÞned by the PowerPC architecture except those
required for supporting ßoating-point operations (the ßoating-point register Þle (FPRs) and
the ßoating-point status and control register (FPSCR)). User-level, PowerPC registers are
listed in Table A-1 and Table A-2. Table A-2 lists user-level special-purpose registers
(SPRs). 
Table A-2 lists SPRs deÞned by the PowerPC architecture implemented on the MPC8260.
Table A-1. User-Level PowerPC Registers (Non-SPRs)
Description
Name
Comments
Access Level
Serialize Access
General-purpose 
registers
GPRs
The thirty-two 32-bit (GPRs) are used for source 
and destination operands. See the 
Programming Environments Manual for more 
information.
User
Ñ
Condition register
CR
See the Programming Environments Manual
User
Only mtcrf
Table A-2. User-Level PowerPC SPRs 
SPR Number
Name
Comments
Serialize Access
Decimal SPR [5Ð9] SPR [0Ð4]
1
00000
00001
XER
See the Programming 
Environments Manual
Write: Full sync
Read: Sync relative to load/store operations
8
00000
01000
LR
See the Programming 
Environments Manual
No
9
00000
01001
CTR
See the Programming 
Environments Manual
No
268
01000
01100
TBL read 
1
1 
Extended opcode for mftb, 371 rather than 339.
See the Programming 
Environments Manual
Write (as a store)
269
01000
01101
TBU read 
2
2 
Any write (mtspr) to this address causes an implementation-dependent software emulation exception.