Motorola DSP56012 User Manual

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6-12
DSP56012 User’s Manual 
MOTOROLA
Serial Audio Interface
Serial Audio Interface Programming Model
discarded according to the Receiver Data Word Truncation (RDWT) control bit (see 
below). RWL[1:0] are also used to generate the word select indication when the 
receiver section is configured as master (RMST = 1). The RWL[1:0] bits are cleared 
during hardware reset and software reset.
6.3.2.6
RCS Receiver Data Shift Direction (RDIR)—Bit 6
The read/write Receiver data shift Direction (RDIR) control bit selects the shift 
direction of the received data. When RDIR is cleared, receive data is shifted in Most 
Significant Bit first. When RDIR is set, the data is shifted in Least Significant Bit first 
(see Figure 6-5). The RDIR bit is cleared during hardware reset and software reset.
6.3.2.7
RCS Receiver Left Right Selection (RLRS)—Bit 7
The read/write Receiver Left Right Selection (RLRS) control bit selects the polarity of 
the Receiver Word Select (WSR) signal that identifies the left or right word in the 
input bit stream. When RLRS is cleared, WSR low identifies the left data word and 
WSR high identifies the right data word. When RLRS is set, WSR high identifies the 
left data word and WSR low identifies the right data word (see Figure 6-6). The RLRS 
bit is cleared during hardware reset and software reset.
Figure 6-5  Receiver Data Shift Direction (RDIR) Programming
Figure 6-6  Receiver Left/Right Selection (RLRS) Programming
MSB
LSB
LSB
MSB
SDI
SDI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SCKR
RDIR = 0
RDIR = 1
AA0431
WSR
Left
Right
RLRS = 1
WSR
Left
Right
RLRS = 0
AA0432