Motorola DSP56012 User Manual
Serial Audio Interface
Serial Audio Interface Programming Model
MOTOROLA
DSP56012 User’s Manual
6-19
6.3.4.7
TCS Transmitter Left Right Selection (TLRS)—Bit 7
The read/write Transmitter Left Right Selection (TLRS) control bit switches the
polarity of the Word Select Transmit (WST) signal that identifies the left or right
word in the output bit stream. When TLRS is cleared, WST low identifies the left data
word and WST high identifies the right data word. When TLRS is set, WST high
identifies the left data word and WST low identifies the right data word (see
Figure 6-11
polarity of the Word Select Transmit (WST) signal that identifies the left or right
word in the output bit stream. When TLRS is cleared, WST low identifies the left data
word and WST high identifies the right data word. When TLRS is set, WST high
identifies the left data word and WST low identifies the right data word (see
Figure 6-11
). The TLRS bit is cleared during hardware reset and software reset.
6.3.4.8
TCS Transmitter Clock Polarity (TCKP)—Bit 8
The read/write Transmitter Clock Polarity (TCKP) control bit switches the polarity
of the transmitter serial clock. When TCKP is cleared, the transmitter clock polarity is
negative. Negative polarity means that the Word Select Transmit (WST) and Serial
Data Out (SDOx) lines change synchronously with the negative edge of the clock,
and are considered valid during positive transitions of the clock. When TCKP is set,
the transmitter clock polarity is positive. Positive polarity means that the WST and
SDOx lines change synchronously with the positive edge of the clock, and are
considered valid during negative transitions of the clock (see Figure 6-12). The TCKP
bit is cleared during hardware reset and software reset.
of the transmitter serial clock. When TCKP is cleared, the transmitter clock polarity is
negative. Negative polarity means that the Word Select Transmit (WST) and Serial
Data Out (SDOx) lines change synchronously with the negative edge of the clock,
and are considered valid during positive transitions of the clock. When TCKP is set,
the transmitter clock polarity is positive. Positive polarity means that the WST and
SDOx lines change synchronously with the positive edge of the clock, and are
considered valid during negative transitions of the clock (see Figure 6-12). The TCKP
bit is cleared during hardware reset and software reset.
Figure 6-10 Transmitter Data Shift Direction (TDIR) Programming
Figure 6-11 Transmitter Left/Right Selection (TLRS) Programming
MSB
LSB
LSB
MSB
SDO
SDO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SCKT
TDIR = 0
TDIR = 1
AA0436k
WST
Left
Right
TLRS = 1
WST
Left
Right
TLRS = 0
AA0437k