Motorola DSP56012 User Manual
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DSP56012 User’s Manual
MOTOROLA
Overview
DSP56012 Architectural Overview
1.3.1
Peripheral Modules
The following peripheral modules are included on the DSP56012:
• Parallel Host Interface—The Host Interface (HI) provides a byte-wide parallel
interface for parallel data transfer between the DSP56012 and a host processor
or another parallel peripheral device. The HI will operate with 8-, 16-, and
24-bit words
or another parallel peripheral device. The HI will operate with 8-, 16-, and
24-bit words
• Serial Host Interface (SHI)—The Serial Host Interface provides a fast, yet
simple serial interface to connect the DSP56012 to a host processor or to
another serial peripheral device. Two serial protocols are available: the
Motorola Serial Peripheral Interface (SPI) bus and the Philips Inter
Integrated-circuit Control (I
another serial peripheral device. Two serial protocols are available: the
Motorola Serial Peripheral Interface (SPI) bus and the Philips Inter
Integrated-circuit Control (I
2
C) bus. The SHI will operate with 8-, 16-, and
24-bit words and the receiver contains an optimal 10-word First-In, First-Out
(FIFO) register to reduce the receive interrupt rate.
(FIFO) register to reduce the receive interrupt rate.
• Serial Audio Interface (SAI)—The SAI provides a synchronous serial
interface that allows the DSP56012 to communicate using a wide range of
standard serial data formats used by audio manufacturers at bit rates up to
one third the DSP core clock rate (e.g., 27 MHz for an 81 MHz clock). There
are three synchronized data transmission lines and two synchronized data
reception lines, all of which are double-buffered.
standard serial data formats used by audio manufacturers at bit rates up to
one third the DSP core clock rate (e.g., 27 MHz for an 81 MHz clock). There
are three synchronized data transmission lines and two synchronized data
reception lines, all of which are double-buffered.
• General Purpose Input/Output (GPIO)—The GPIO has eight dedicated
signal lines that can be independently programmed to be inputs, standard
TTL outputs, open collector outputs, or disconnected.
TTL outputs, open collector outputs, or disconnected.
• Digital Audio Transmitter (DAX)—The DAX is a serial audio interface
module that outputs digital audio data in AES/EBU, CP-340, and IEC958
formats.
formats.
1.3.2
DSP Core Processor
The 24-bit DSP56000 core is composed of a Data ALU, an AGU, a program controller,
and the buses that connect them together. The OnCE port and a PLL are integral
parts of this processor.
and the buses that connect them together. The OnCE port and a PLL are integral
parts of this processor.
showing the components of the core processor, as well as the peripherals specific to
the DSP56012. The following paragraphs present a brief overview of the DSP56000
core processor. For more thorough detail, refer to the
the DSP56012. The following paragraphs present a brief overview of the DSP56000
core processor. For more thorough detail, refer to the
DSP56000 Family Manual
.