Intel Xeon E5502 80602E5502 User Manual
Product codes
80602E5502
Register Description
118
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
2.18
Memory Thermal Control
2.18.1
MC_THERMAL_CONTROL0
MC_THERMAL_CONTROL1
MC_THERMAL_CONTROL2
Controls for the Integrated Memory Controller thermal throttle logic for each channel.
Device:
6
Function: 2
Offset:
80h, 84h, 88h, 8Ch, 90h, 94h, 98h, 9Ch, A0h, A4h, A8h, ACh, B0h, B4h, B8h, BCh, C0h,
C4h, C8h, CCh, D0h, D4h, D8h, DCh, E0h, E4h, E8h, ECh, F0h, F4h, F8h, FCh
Access as a Dword
Bit
Type
Reset
Value
Description
13:4
RW
0
OFFSET. Defines the offset used in the rank interleave. This is a 2's
complement value.
3:0
RW
0
RANK. Defines which rank participates in WAY(n). If
MC_CONTROL.CLOSED_PAGE=1, this field defines the DRAM rank selected
when MemoryAddress[7:6]=(n). If MC_CONTROL.CLOSED_PAGE=0, this field
defines which rank is selected when MemoryAddress[13:12]=(n). (n) is the
instantiation of the register. This field is organized by physical rank. Bits [3:2]
are the encoded DIMM ID(slot). Bits [1:0] are the rank within that DIMM.
Device:
4, 5, 6
Function: 3
Offset:
48h
Access as a Dword
Bit
Type
Reset
Value
Description
2
RW
1
APPLY_SAFE. Enable the application of safe values while
MC_THERMAL_PARAMS_B.SAFE_INTERVAL is exceeded.
1:0
RW
0
THROTTLE_MODE. Selects throttling mode. When in lockstep mode, this field
should only be non-zero for Channel0.
0: Throttle disabled
0: Throttle disabled
1: Open Loop: Throttle when Virtual Temperature is greater than
MC_THROTTLE_OFFSET.
2: Closed Loop: Throttle when MC_CLOSED_LOOP.THROTTLE_NOW is set.
3: Closed Loop: Throttle when MC_DDR_THERM_COMMAND.THROTTLE is set
and the MC_DDR_THERM pin is asserted OR OLTT will be implemented
(Condition 1).