Motorola IH5 User Manual
Memory Maps
http://www.motorola.com/computer/literature
2-13
2
Role of the Raven ASIC
Because the PCI bus is little-endian, the Raven performs byte swapping in
both directions (from PCI to memory and from the processor to PCI) to
maintain address invariance while programmed to operate in big-endian
mode with the processor and the memory subsystem.
both directions (from PCI to memory and from the processor to PCI) to
maintain address invariance while programmed to operate in big-endian
mode with the processor and the memory subsystem.
In little-endian mode, the Raven reverse-rearranges the address for PCI-
bound accesses and rearranges the address for memory-bound accesses
(from PCI). In this case, no byte swapping is done.
bound accesses and rearranges the address for memory-bound accesses
(from PCI). In this case, no byte swapping is done.
PCI Domain
The PCI bus is inherently little-endian. All devices connected directly to
the PCI bus operate in little-endian mode, regardless of the mode of
operation in the processor’s domain.
the PCI bus operate in little-endian mode, regardless of the mode of
operation in the processor’s domain.
PCI and Ethernet
Ethernet is also byte-stream-oriented; the byte having the lowest address
in memory is the first one to be transferred regardless of the endian mode.
Since the Raven maintains address invariance in both little-endian and big-
endian mode, no endian issues should arise for Ethernet data. Big-endian
software must still take the byte-swapping effect into account when
accessing the registers of the PCI/Ethernet device, however.
in memory is the first one to be transferred regardless of the endian mode.
Since the Raven maintains address invariance in both little-endian and big-
endian mode, no endian issues should arise for Ethernet data. Big-endian
software must still take the byte-swapping effect into account when
accessing the registers of the PCI/Ethernet device, however.