Compaq EV67 User Manual
Alpha 21264/EV67 Hardware Reference Manual
Privileged Architecture Library Code
6–5
Opcodes Reserved for PALcode
Table 6–4 describes the HW_ST instruction fields.
6.4.3 HW_RET Instruction
The HW_RET instruction is used to return instruction flow to a specified PC. The RB
field of the HW_RET instruction specifies an integer GPR, which holds the new value
of the PC. Bit [0] of this register provides the new value of PALmode after the
HW_RET instruction is executed. Bits [15:14] of the instruction determine the stack
action.
field of the HW_RET instruction specifies an integer GPR, which holds the new value
of the PC. Bit [0] of this register provides the new value of PALmode after the
HW_RET instruction is executed. Bits [15:14] of the instruction determine the stack
action.
Normally the HW_RET instruction succeeds a CALL_PAL instruction, or a trap han-
dler that pushed its PC onto the prediction stack. In this mode, the HINT should be set
to ‘10’ to pop the PC and generate a predicted target address for the HW_RET instruc-
tion.
dler that pushed its PC onto the prediction stack. In this mode, the HINT should be set
to ‘10’ to pop the PC and generate a predicted target address for the HW_RET instruc-
tion.
In some conditions, the HW_RET instruction is used in the middle of a PALcode flow
to cause a group of instructions to retire. In these cases, if the HW_RET instruction
does not have a corresponding instruction that pushed a PC onto the stack, the HINT
field should be set to ‘00’ to keep the stack from being modified.
to cause a group of instructions to retire. In these cases, if the HW_RET instruction
does not have a corresponding instruction that pushed a PC onto the stack, the HINT
field should be set to ‘00’ to keep the stack from being modified.
In the rare circumstance that the HW_RET instruction might be used like a JSR or
JSR_COROUTINE, the stack can be managed by setting the HINT bits accordingly.
JSR_COROUTINE, the stack can be managed by setting the HINT bits accordingly.
See Section D.25 for more information about the HW_RET instruction.
Figure 6–3 shows the HW_RET instruction format.
Table 6–4 HW_ST Instruction Fields Descriptions
Extent
Mnemonic Value Description
[31:26]
OPCODE
1F
16
The opcode value.
[25:21]
RA
—
Write data register number.
[20:16]
RB
—
Base register for memory address.
[15:13]
TYPE
000
2
Physical — The effective address for the HW_ST instruction is physical.
001
2
Physical/Cond — The effective address for the HW_ST instruction is
physical. Store conditional version of the HW_ST instruction. The lock
flag is returned in RA. Refer to PALcode restrictions for correct use of this
function.
physical. Store conditional version of the HW_ST instruction. The lock
flag is returned in RA. Refer to PALcode restrictions for correct use of this
function.
010
2
Virtual — The effective address for the HW_ST instruction is virtual.
110
2
Virtual/Alt — The effective address for the HW_ST instruction is virtual.
Access checks use DTB_ ALT_MODE IPR.
Access checks use DTB_ ALT_MODE IPR.
All others Unused.
[12]
LEN
0
1
Access length is longword.
Access length is quadword.
[11:0]
DISP
—
Holds a 12-bit signed byte displacement.