Analog Devices AD9736 Evaluation Board AD9736-DPG2-EBZ User Manuals

Table of Contents

• FEATURES

  1
• APPLICATIONS

  1
• GENERAL DESCRIPTION

  1
• FUNCTIONAL BLOCK DIAGRAM

  1
• PRODUCT HIGHLIGHTS

  1
• TABLE OF CONTENTS

  2
• REVISION HISTORY

  3
• SPECIFICATIONS

  4
  • DC SPECIFICATIONS

    4
  • DIGITAL SPECIFICATIONS

    6
  • AC SPECIFICATIONS

    8
• ABSOLUTE MAXIMUM RATINGS

  9
  • THERMAL RESISTANCE

    9
  • ESD CAUTION

    9
• PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

  10
  • LOCATION OF SUPPLY AND CONTROL PINS

    16
• TERMINOLOGY

  17
• TYPICAL PERFORMANCE CHARACTERISTICS

  18
  • AD9736 STATIC LINEARITY, 10 mA FULL SCALE

    18
  • AD9736 STATIC LINEARITY, 20 mA FULL SCALE

    19
  • AD9736 STATIC LINEARITY, 30 mA FULL SCALE

    20
  • AD9735 STATIC LINEARITY, 10 mA, 20 mA, 30 mA FULL SCALE

    21
  • AD9734 STATIC LINEARITY, 10 mA, 20 mA, 30 mA FULL SCALE

    22
  • AD9736 POWER CONSUMPTION, 20 mA FULL SCALE

    23
  • AD9736 DYNAMIC PERFORMANCE, 20 mA FULL SCALE

    24
  • AD9735, AD9734 DYNAMIC PERFORMANCE, 20 mA FULL SCALE

    27
• SPI REGISTER MAP

  29
• SPI REGISTER DETAILS

  30
  • MODE REGISTER (REG. 0)

    30
  • INTERRUPT REQUEST REGISTER (IRQ) (REG. 1)

    30
  • FULL SCALE CURRENT (FSC) REGISTERS (REG. 2, REG. 3)

    31
  • LVDS CONTROLLER (LVDS_CNT) REGISTERS (REG. 4, REG. 5, REG. 6)

    31
  • SYNC CONTROLLER (SYNC_CNT) REGISTERS (REG. 7, REG. 8)

    32
  • CROSS CONTROLLER (CROS_CNT) REGISTERS (REG. 10, REG. 11)

    32
  • ANALOG CONTROL (ANA_CNT) REGISTERS (REG. 14, REG. 15)

    33
  • BUILT-IN SELF TEST CONTROL (BIST_CNT) REGISTERS (REG. 17, REG. 18, REG. 19, REG. 20, REG. 21)

    33
  • CONTROLLER CLOCK PREDIVIDER (CCLK_DIV) READING REGISTER (REG. 22)

    34
• THEORY OF OPERATION

  35
• SERIAL PERIPHERAL INTERFACE

  36
  • GENERAL OPERATION OF THE SERIAL INTERFACE

    36
  • SHORT INSTRUCTION MODE (8-BIT INSTRUCTION)

    36
  • LONG INSTRUCTION MODE (16-BIT INSTRUCTION)

    36
  • SERIAL INTERFACE PORT PIN DESCRIPTIONS

    36
    • SCLK—Serial Clock

      36
    • CSB—Chip Select

      37
    • SDIO—Serial Data I/O

      37
    • SDO—Serial Data Out

      37
  • MSB/LSB TRANSFERS

    37
  • NOTES ON SERIAL PORT OPERATION

    37
  • PIN MODE OPERATION

    38
  • RESET OPERATION

    38
  • PROGRAMMING SEQUENCE

    38
  • INTERPOLATION FILTER

    39
  • DATA INTERFACE CONTROLLERS

    39
  • LVDS SAMPLE LOGIC

    40
  • LVDS SAMPLE LOGIC CALIBRATION

    40
  • OPERATING THE LVDS CONTROLLER IN MANUAL MODE VIA THE SPI PORT

    41
  • OPERATING THE LVDS CONTROLLER IN SURVEILLANCE AND AUTO MODE

    41
• SYNC LOGIC AND CONTROLLER

  42
  • SYNC LOGIC AND CONTROLLER OPERATION

    42
  • OPERATION IN MANUAL MODE

    42
  • OPERATION IN SURVEILLANCE AND AUTO MODES

    42
  • FIFO BYPASS

    42
• DIGITAL BUILT-IN SELF TEST (BIST)

  44
  • OVERVIEW

    44
  • AD973x BIST PROCEDURE

    45
  • AD973x EXPECTED BIST SIGNATURES

    45
  • GENERATING EXPECTED SIGNATURES

    46
• CROSS CONTROLLER REGISTERS

  47
• ANALOG CONTROL REGISTERS

  48
  • BAND GAP TEMPERATURE CHARACTERISTIC TRIM BITS

    48
  • MIRROR ROLL-OFF FREQUENCY CONTROL

    48
  • HEADROOM BITS

    48
  • VOLTAGE REFERENCE

    48
• APPLICATIONS INFORMATION

  50
  • DRIVING THE DACCLK INPUT

    50
• DAC OUTPUT DISTORTION SOURCES

  51
• DC-COUPLED DAC OUTPUT

  52
• DAC DATA SOURCES

  53
• INPUT DATA TIMING

  54
• SYNCHRONIZATION TIMING

  55
• POWER SUPPLY SEQUENCING

  56
• AD973x EVALUATION BOARD SCHEMATICS

  57
• AD973x EVALUATION BOARD PCB LAYOUT

  62
• OUTLINE DIMENSIONS

  69
  • ORDERING GUIDE

    69