Cypress CY7C68033 Manual De Usuario

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CY7C68033/CY7C68034
Document #: 001-04247 Rev. *D
Page 9 of 33
Endpoint RAM
Size
• 3 × 64 bytes
(Endpoints 0 and 1)
• 8 × 512 bytes  (Endpoints 2, 4, 6, 8)
Organization
• EP0
— Bidirectional endpoint zero, 64-byte buffer
• EP1IN, EP1OUT 
— 64-byte buffers, bulk or interrupt
• EP2,4,6,8 
— Eight 512-byte buffers, bulk, interrupt, or isochronous.
— EP4 and EP8 can be double buffered, while EP2 and 6 
can be either double, triple, or quad buffered. 
For high-speed endpoint configuration options, see Figure 8.
Setup Data Buffer
A separate 8-byte buffer at 0xE6B8-0xE6BF holds the setup
data from a CONTROL transfer.
Endpoint Configurations (High-speed Mode)
Endpoints 0 and 1 are the same for every configuration.
Endpoint 0 is the only CONTROL endpoint, and endpoint 1 can
be either BULK or INTERRUPT. The endpoint buffers can be
configured in any 1 of the 12 configurations shown in the
vertical columns. When operating in full-speed BULK mode,
only the first 64 bytes of each buffer are used. For example, in
high-speed the max packet size is 512 bytes, but in full-speed
it is 64 bytes. Even though a buffer is configured to be a 512
byte buffer, in full-speed only the first 64 bytes are used. The
unused endpoint buffer space is not available for other opera-
tions. An example endpoint configuration would be:
EP2–1024 double buffered; EP6–512 quad buffered
(column 8 in Figure 8).
Figure 8. Endpoint Configuration
Default Full-Speed Alternate Settings 
64
64
64
512
512
1024
1024
1024
1024
1024
1024
1024
512
512
512
512
512
512
512
512
512
512
EP2
EP2 EP2
EP6
EP6
EP8
EP8
EP0 IN&OUT
EP1 IN
EP1 OUT
1024
1024
EP6
1024
512
512
EP8
512
512
EP6
512
512
512
512
EP2
512
512
EP4
512
512
EP2
512
512
EP4
512
512
EP2
512
512
EP4
512
512
EP2
512
512
512
512
EP2
512
512
512
512
EP2
512
512
1024
EP2
1024
1024
EP2
1024
1024
EP2
1024
512
512
EP6
1024
1024
EP6
512
512
EP8
512
512
EP6
512
512
512
512
EP6
1024
1024
EP6
512
512
EP8
512
512
EP6
512
512
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
1
2
3
4
5
6
7
8
9
10
11
12
Table 6. Default Full-Speed Alternate Settings
Alternate Setting
0
1
2
3
ep0
64
64
64
64
ep1out
0
64 bulk
64 int
64 int
ep1in
0
64 bulk
64 int
64 int
ep2
0
64 bulk out (2×)
64 int out (2×)
64 iso out (2×)
Notes
2. ‘0’ means ‘not implemented.’
3. ‘2×’ means ‘double buffered.’