Cypress CY8C20396 Manual De Usuario

Document Number: 001-12696  Rev. *D

Page 16 of 34

The following table lists the guaranteed maximum and minimum specifications. Unless stated otherwise, the specifications are for the
entire device voltage and temperature operating range: –40°C <= TA <= 85°C, 1.71V <= Vdd <= 5.5V. 

T

COMP

Comparator Response Time 

70

100

ns

50 mV overdrive

Offset

2.5

30

mV

Current

20

80

µA

Average DC current, 50 mV 
overdrive

PSRR

Supply voltage >2V

80

dB

Power Supply Rejection Ratio

Supply voltage <2V

40

dB

Power Supply Rejection Ratio

Input 
Range

0

1.5

V

5. Monotonicity is not guaranteed.

V

IN

Input Voltage Range

Vss

1.3

V

This gives 72% of maximum 
code

C

IN

Input Capacitance

5

pF

RES

Resolution

8

10

Bits

Settings 8, 9, or 10

S8

8-Bit Sample Rate

23.4375

ksps

Data Clock set to 6 MHz. 
Sample Rate = 0.001/
(2^Resolution/Data clock)

S10

10-Bit Sample Rate

5.859

ksps

Data Clock set to 6 MHz. 
Sample Rate = 0.001/
(2^Resolution/Data clock)

DNL

Differential Nonlinearity

-1

+2

LSB

For any configuration

INL

Integral Nonlinearity          

-2

+2

LSB

For any configuration

Eoffset

          Offset Error

0

15

90

mV

I

ADC

Operating Current

275

350

μA

F

CLK

Data Clock

2.25

12

MHz

Source is chip’s internal main 
oscillator. See device data 
sheet for accuracy.

PSRR

Power Supply Rejection Ration

          PSRR (Vdd>3.0V)

24

dB

          PSRR (2.2 < Vdd < 3.0)

30

dB

          PSRR (2.0 < Vdd < 2.2)

12

dB

          PSRR (Vdd < 2.0)

0

dB

Egain

Gain Error 

1

5

%FSR For any resolution

R

IN

Input Resistance

1/(500fF*

Data-Clock)

1/(400fF*

Data-Clock)

1/(300fF*

Data-Clock)

Ω

Equivalent switched cap input 
resistance for 8-, 9-, or 10-bit 
resolution.