Cypress CYS25G0101DX-ATC Manual De Usuario

10

5

LOOPTIME

ON

The transmission will be using the extracted receive bit-clock for the 
transmitted bit clock

OFF*

The transmission will be using the REFCLK input (155.52 MHz), which 
is multiplied by 16, to generate the transmitted bit clock

6

LOCKREF

ON*

The receive PLL locks to serial data stream

OFF

The receive PLL locks to the REFCLK

7

PWRDN

ON*

Disable Power Down - Normal Operation

OFF

Enable Device Power Down mode. All the logic and drivers are dis-
abled and placed into a standby condition where only minimal power is 
dissipated

8

FIFO_RST

ON*

Disable FIFO reset - Normal Operation

OFF

Reset the transmit FIFO pointers. The in and out pointers of the trans-
mit FIFO are reset to the maximum separation

1A, 1B, 3A, 3B

VCC_OPTIC

Power supply for optical module

2A, 2B, 4A, 4B

GND

Power ground

5A

NC

No Connection

5B

SD

SD signal from optical module

D1

FIFO_ERR

ON

The transmit FIFO has either under or overflowed. The FIFO 
must be reset to clear the error (by switching the DIP switch 
SW1-8 to OFF and then ON. See 

 for details)

OFF

Indicates the FIFO has neither under or overflowed

D2

LFI

ON

Indicates no Line Fault. It will appear to be ON even when LFI is 
toggling. In such a case observe LFI using a scope on J7

OFF

Indicates the selected receive data stream has been detected an 
invalid either LOW input on SD or by the receive VCO being oper-
ated outside its specified limits

 (continued)