Cypress CYS25G0101DX-ATC Manual De Usuario
CYS25G0101DX-ATC Evaluation Board User’s Guide
23
10. Schematic Diagram, PCB Layout and BOM (Bill of Material)
Figure 17
to
Figure 23
in
Appendix A
shows the schematic diagram of the CYS25G0101DX evaluation board.
Figure 17
is the top level
diagram for the schematic diagrams for
Figure 18
to
Figure 23
.
Figure 24
to
Figure 32
in
Appendix B
show the PCB layout of each layer
of the CYS25G0101DX evaluation board. The Bill of Material (BOM) of the evaluation board is listed in
Appendix C
(for LVPECL
Table
8
to
Table 11
) and
Appendix D
(for HSTL
Table 12
to
Table 15
) respectively.
Notes:
1. The operation voltage VCC for the device at the power supply nodes.
2. The operation current drawn by supply VCC at room temperature.
3. Assumes onboard clock option. If external clock (SMA option) is used the current drawn will depend on the termination resistors required for
2. The operation current drawn by supply VCC at room temperature.
3. Assumes onboard clock option. If external clock (SMA option) is used the current drawn will depend on the termination resistors required for
the external clock.
Table 7. Operation Specification of CYS25G0101DX Evaluation Board
Description
Min.
Max.
Unit
Notes
Power Supply VCC
3.135
3.465
V
1
Current I
VCC
280
320
mA
2
Clock Power Supply CLKVCC
3.135
3.465
V
Current I
CLKVCC
75
90
mA
3