Cypress CY8C23433 Manual De Usuario
CY8C23433, CY8C23533
Document Number: 001-44369 Rev. *B
Page 22 of 37
DC Analog PSoC Block Specifications
The following table lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
and -40°C
≤ T
A
≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T
A
≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
DC POR and LVD Specifications
The following table lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
and -40°C
≤ T
A
≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T
A
≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Note The bits PORLEV and VM in the following table refer to bits in the VLT_CR register. See the PSoC Mixed-Signal Array Technical
Reference Manual for more information on the VLT_CR register.
Reference Manual for more information on the VLT_CR register.
–
RefHi = 2 x BandGap + P2[6]
(P2[6] = 0.5V)
(P2[6] = 0.5V)
Not Allowed
–
RefHi = P2[4] + BandGap (P2[4] = Vdd/2)
Not Allowed
–
RefHi = P2[4] + P2[6] (P2[4] = Vdd/2,
P2[6] = 0.5V)
P2[6] = 0.5V)
P2[4] + P2[6] - 0.075
P2[4] + P2[6] - 0.009
P2[4] + P2[6] + 0.057
V
–
RefHi = 3.2 x BandGap
Not Allowed
–
RefLo = Vdd/2 - BandGap
Not Allowed
–
RefLo = BandGap
Not Allowed
–
RefLo = 2 x BandGap - P2[6] (P2[6] =
0.5V)
0.5V)
Not Allowed
–
RefLo = P2[4] – BandGap (P2[4] = Vdd/2)
Not Allowed
–
RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6]
= 0.5V)
= 0.5V)
P2[4] - P2[6] - 0.048
P2[4]- P2[6] + 0.022
P2[4] - P2[6] + 0.092
V
Table 19. 3.3V DC Analog Reference Specifications (continued)
Symbol
Description
Min
Typ
Max
Units
Table 20. DC Analog PSoC Block Specifications
Symbol
Description
Min
Typ
Max
Units
R
CT
Resistor Unit Value (Continuous Time)
–
12.2
–
k
Ω
C
SC
Capacitor Unit Value (Switch Cap)
–
80
–
fF
Table 21. DC POR and LVD Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
V
PPOR1
V
PPOR2
Vdd Value for PPOR Trip
PORLEV[1:0] = 01b
PORLEV[1:0] = 10b
PORLEV[1:0] = 01b
PORLEV[1:0] = 10b
–
2.82
4.55
4.55
2.95
4.70
4.70
V
V
V
Vdd must be greater than or equal
to 2.5V during startup or reset from
Watchdog.
to 2.5V during startup or reset from
Watchdog.
V
LVD1
V
LVD2
V
LVD3
V
LVD4
V
LVD5
V
LVD6
V
LVD7
Vdd Value for LVD Trip
VM[2:0] = 001b
VM[2:0] = 001b
VM[2:0] = 010b
VM[2:0] = 011b
VM[2:0] = 100b
VM[2:0] = 101b
VM[2:0] = 110b
VM[2:0] = 111b
VM[2:0] = 011b
VM[2:0] = 100b
VM[2:0] = 101b
VM[2:0] = 110b
VM[2:0] = 111b
2.85
0
2.95
3.06
4.37
4.50
4.62
4.71
3.06
4.37
4.50
4.62
4.71
2.92
0
3.02
3.13
4.48
4.64
4.73
4.81
3.13
4.48
4.64
4.73
4.81
2.99
3.09
3.20
4.55
4.75
4.83
4.95
3.20
4.55
4.75
4.83
4.95
V
0
V
0
V
0
V
0
V
0
V
V
V
Notes
9. C
SC
is a design guarantee parameter, not tested value
10. Always greater than 50 mV above V
PPOR
(PORLEV=01) for falling supply.