Cypress CY14B108N Manual De Usuario

Document #: 001-45523 Rev. *B

Page 7 of 24

The AutoStore function is disabled by initiating an AutoStore

disable sequence. A sequence of read operations is performed

in a manner similar to the Software STORE initiation. To initiate

the AutoStore disable sequence, the following sequence of CE

controlled read operations must be performed:

1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x8B45 AutoStore Disable

The AutoStore is re-enabled by initiating an AutoStore enable

sequence. A sequence of read operations is performed in a

manner similar to the Software RECALL initiation. To initiate the

AutoStore enable sequence, the following sequence of CE

controlled read operations must be performed:

1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x4B46 AutoStore Enable

If the AutoStore function is disabled or re-enabled, a manual

STORE operation (Hardware or Software) must be issued to

save the AutoStore state through subsequent power down

cycles. The part comes from the factory with AutoStore enabled.

The CY14B108L/CY14B108N protects data from corruption

during low voltage conditions by inhibiting all externally initiated

STORE and write operations. The low voltage condition is

detected when V

CC

 < V

SWITCH

. If the CY14B108L/CY14B108N

is in a write mode (both CE and WE are LOW) at power up, after

a RECALL or STORE, the write is

 

inhibited until the SRAM is

enabled after t

LZHSB 

(HSB to output active). This protects against

inadvertent writes during power up or brown out conditions.

AN1064

.

nvSRAM products have been used effectively for over 15 years.

While ease-of-use is one of the product’s main system values,

experience gained working with hundreds of applications has

resulted in the following suggestions as best practices:

■

The nonvolatile cells in this nvSRAM product are delivered from 

Cypress with 0x00 written in all cells. Incoming inspection 

routines at customer or contract manufacturer’s sites 

sometimes reprogram these values. Final NV patterns are 

typically repeating patterns of AA, 55, 00, FF, A5, or 5A. End 

product’s firmware should not assume an NV array is in a set 

programmed state. Routines that check memory content 

values to determine first time system configuration, cold or 

warm boot status, and so on should always program a unique 

NV pattern (that is, complex 4-byte pattern of 46 E6 49 53 hex 

or more random bytes) as part of the final system manufac-

turing test to ensure these system routines work consistently.

■

Power up boot firmware routines should rewrite the nvSRAM 

into the desired state (for example, autostore enabled). While 

the nvSRAM is shipped in a preset state, best practice is to 

again rewrite the nvSRAM into the desired state as a safeguard 

against events that might flip the bit inadvertently such as 

program bugs and incoming inspection routines.

■

The V

CAP 

value specified in this data sheet includes a minimum 

and a maximum value size. Best practice is to meet this 

requirement and not exceed the maximum V

CAP 

value because 

the nvSRAM internal algorithm calculates V

CAP 

charge and 

discharge time based on this max V

CAP

 value. Customers that 

want to use a larger V

CAP 

value to make sure there is extra 

store charge and store time should discuss their V

CAP 

size 

selection with Cypress to understand any impact on the V

CAP 

voltage level at the end of a t

RECALL

 

period.