SMSC LAN1198 Manual De Usuario
LAN9118 Family Programmer Reference Guide
SMSC AN 12.12
11
Revision 1.0 (12-14-09)
APPLICATION NOTE
4.4 Register Functionality in the LAN9118 Family Devices
details the functions of the most important
LAN9118 Family CSRs
Note: Notice that both the filter and link management functions depend upon the MAC_CSR_
registers. This shows the importance of synchronizing access to these particular registers
between the filter and link management threads.
between the filter and link management threads.
Table 4.1 Independent Data Threads Register Usage
RECEIVE REGISTER NAME
OFFSET
PURPOSE
RX_FIFO_INF
0x7c
Determine whether a packet is available
RX_STATUS_FIFO_PORT
0x40
Determine receive packet properties, such as size
RX_DATA_FIFO_PORT
0x00
Read received packet from device
TRANSMIT REGISTER NAME
OFFSET
PURPOSE
TX_FIFO_INF
0x80
Determine remaining free space in transmit FIFO, and
number of packet statuses available
TX_STATUS_FIFO_PORT
0x48
Determine whether packets were sent successfully
TX_DATA_FIFO_PORT
0x20
Write packet data to device
FILTER REGISTER NAME
OFFSET
PURPOSE
MAC_CSR_CMD
0xa4
Access to MAC_CR, HASHH, and HASHL
MAC_CSR_DATA
0xa8
Access to MAC_CR, HASHH, and HASHL
LINK REGISTER NAME
OFFSET
PURPOSE
MAC_CSR_CMD
0xa4
Access to MII_ACC and MII_DATA
MAC_CSR_DATA
0xa8
Access to MII_ACC and MII_DATA
MII_ACC
0x6
Determine remaining free space in transmit FIFO, and
number of packet statuses available
MII_DATA
0x7
Determine whether packets were sent successfully