Renesas HD64F2111B Manual De Usuario

Rev. 1.00, 05/04, page 168 of 544 

 

4 

OCRS 

0 

R/W 

Output Compare Register Select 

OCRA and OCRB share the same address. When this 
address is accessed, the OCRS bit selects which 
register is accessed. The operation of OCRA or OCRB 
is not affected. 

0: OCRA is selected 

1: OCRB is selected 

3 OEA  0  R/W 

Output 

Enable 

A 

Enables or disables output of the output compare A 
output pin (FTOA). 

0: Output compare A output is disabled 

1: Output compare A output is enabled 

2 OEB  0  R/W 

Output 

Enable 

B 

Enables or disables output of the output compare B 
output pin (FTOB). 

0: Output compare B output is disabled 

1: Output compare B output is enabled 

1 

OLVLA 

0 

R/W 

Output Level A 

Selects the level to be output at the output compare A 
output pin (FTOA) in response to compare-match A 
(signal indicating a match between the FRC and OCRA 
values). When the OCRAMS bit is 1, this bit is ignored. 

0: 0 is output at compare-match A 

1: 1 is output at compare-match A 

0 

OLVLB 

0 

R/W 

Output Level B 

Selects the level to be output at the output compare B 
output pin (FTOB) in response to compare-match B 
(signal indicating a match between the FRC and OCRB 
values). 

0: 0 is output at compare-match B

1: 1 is output at compare-match B