HP (Hewlett-Packard) PCI-9111DG/HR Manual De Usuario

Operation Theorem 

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software must continuously read data out from the FIFO to prevent FIFO 
full. The software also should poll the counter value to check if the A/D 
sampling is stopped. 

To set up the Pre-Trigger mode, the following steps should be followed: 

1. Set Pre-Trigger Mode Off: PTRG = OFF. 
2. Set 8254 Counter #0 value N (N=1~65535). Note that the larger the 

counter value, the more host memory buffer is needed. 

3. Set up A/D data acquire, including, A/D range, channel scan, data 

transfer mode and so on. 

4. Set Pre-Trigger Mode On: PTRG = ON. 
5. Read A/D data into host PC memory buffer by certain data transfer 

method, otherwise the FIFO will full. At the same time, wait the 
pre-trigger signal and check if the 8254 Counter # 0 value is down 
to zero. 

6. If A/D is stopped, set the Pre-Trigger Mode off and process the 

data which stored in the host memory.  

7. Go to Step 1 to set the Pre-Trigger mode and wait the next 

pre-trigger event. 

 

The Pre-Trigger timing is shown as following: 

 

 

 
 
 
 
 
 
 
 

If the application acquires data after the pre-trigger signal, only the last N 
data need to be stored. The maximum value of N is 65535. If the 
application only needs to acquire data before the pre-trigger signal, set 
N=1 then just one more data will be sampled after pre-trigger signal and 
infinite data before pre-trigger signal can be stored. 

 

 

 

Acquire N A/D data after 
Pre-trigger Signal is Inserted 

Acquire Infinite A/D data before 

Pre-Trigger Signal is Inserted 

Counter # 0 counting 
from N down to 0 

Set Pre-Trigger 

mode

 

External Pre-Trigger 

Signal is Inserted

 

A/D Data 

Acquisition Stop