HP (Hewlett-Packard) PCI-9111DG/HR Manual De Usuario

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30 
 Operation Theorem 
4.1.6 
A/D Data Format 
The A/D data read from the FIFO is in the two‘s complement format. As 
the A/D gain is 1, the A/D signal range is roughly +10V ~ -10V bi-polar. In 
PCI-9111HR, the whole 16 bits A/D data are available. The relationship 
between voltage and the A/D data value is shown in the following table: 
A/D Data (Hex) 
Decimal Value 
Voltage (Volts) 
7FFF 
+32767 
+9.99969 
4000 
+16384 
+5.00000 
0001 
+0.00031 
0000 
0.00000 
FFFF 
-1 
-0.00031 
C000 
-16384 
-5.00000 
8001 
-32767 
-9.99969 
8000 
-32768 
-10.00031 
Note: 
the decimal value of the A/D data is in the same sign with the 
bi-polar voltage. Therefore, the sign extension conversion is not 
necessary. 
The A/D converted data of 12 bits PCI-9111DG is on the 12 MSBs of the 
A/D data. The 4 LSB of the 16 bits A/D data are the channel number and 
must be truncated by software. The relationship between voltage and the 
A/D converted data value is shown in the following table: 
A/D Converted 
Data (Hex) 
Decimal Value 
Voltage (Volts) 
7FF 
+2047 
+9.9951 
400 
+1024 
+5.0000 
001 
+1 
+0.0049 
000 
0.0000 
FFF 
-1 
-0.0049 
C00 
-1024 
-5.0000 
801 
-2047 
-9.9951 
800 
-2048 
-10.0000 
The formula between the A/D converted data and the voltage value is: 
Voltage
AD data
K
gain
=
× ×
_
1
10
 
where  gain  is the value of the A/D gain control register.  K=32768 for 
PCI-9111HR, and K=2048 for PCI-9111DG.