Cypress CY62138CV30 Manual De Usuario
Document #: 001-08029 Rev. *E
Page 3 of 13
CY62138FV30 MoBL
®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................... 55°C to +125°C
Supply Voltage to Ground
Supply Voltage to Ground
Potential........................................................... –0.3V to 3.9V
DC Voltage Applied to Outputs
DC Voltage Applied to Outputs
in High-Z State
.......................................... –0.3V to 3.9V
DC Input Voltage
.......................................–0.3V to 3.9V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
Static Discharge Voltage.......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch-up Current .................................................... > 200 mA
Latch-up Current .................................................... > 200 mA
Product
Range
Ambient
Temperature
V
CC
CY62138FV30LL Industrial –40°C to +85°C 2.2V to 3.6V
Electrical Characteristics
(Over the Operating Range)
Parameter
Description
Test Conditions
45 ns
Unit
Min
Typ
Max
V
OH
Output HIGH Voltage
I
OH
= –0.1 mA
2.0
V
I
OH
= –1.0 mA, V
CC
> 2.70V
2.4
V
V
OL
Output LOW Voltage
I
OL
= 0.1 mA
0.4
V
I
OL
= 2.1 mA, V
CC
> 2.70V
0.4
V
V
IH
Input HIGH Voltage
V
CC
= 2.2V to 2.7V
1.8
V
CC
+ 0.3V
V
V
CC
= 2.7V to 3.6V
2.2
V
CC
+ 0.3V
V
V
IL
Input LOW Voltage
V
CC
= 2.2V to 2.7V For BGA package
–0.3
0.6
V
V
CC
= 2.7V to 3.6V
–0.3
0.8
V
V
CC
= 2.2V to 3.6V For other packages
–0.3
0.6
V
I
IX
Input Leakage Current
GND < V
I
< V
CC
–1
+1
µA
I
OZ
Output Leakage Current
GND < V
O
< V
CC
,
output disabled
–1
+1
µA
I
CC
V
CC
Operating Supply Current f = f
max
= 1/t
RC
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
13
18
mA
f = 1 MHz
1.6
2.5
I
SB1
Automatic CE Power Down
Current CMOS Inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V),
f = f
max
(address and data only),
f = 0 (OE, and WE), V
CC
= 3.60V
1
5
µA
I
SB2
Automatic CE Power Down
Current CMOS Inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.60V
1
5
µA
Capacitance
(For all packages)
Parameter
Description
Test Conditions
Max
Unit
C
IN
Input Capacitance
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ.)
10
pF
C
OUT
Output Capacitance
10
pF
Notes
4. V
IL(min)
=
–
2.0V for pulse durations less than 20 ns.
5. V
IH(max)
= V
CC
+0.75V for pulse durations less than 20 ns.
6. Full device AC operation assumes a 100
µs ramp time from 0 to V
CC
(min) and 200
µs wait time after V
CC
stabilization.
7. Only chip enables (CE
1
and CE
2
) must be at CMOS level to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
8. Tested initially and after any design or process changes that may affect these parameters.