Renesas R5S72625 Manual De Usuario
Section 15 Serial Communication Interface with FIFO
R01UH0134EJ0400 Rev. 4.00
Page 729 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
2
PER
0
R
Parity Error Indication
Indicates a parity error in the data read from the next
receive FIFO data register (SCFRDR) in
asynchronous mode.
receive FIFO data register (SCFRDR) in
asynchronous mode.
0: No receive parity error occurred in the next data
read from SCFRDR
[Clearing conditions]
PER is cleared to 0 when the chip undergoes a
power-on reset
PER is cleared to 0 when no parity error is present
in the next data read from SCFRDR
1: A receive parity error occurred in the next data read
from SCFRDR
[Setting condition]
PER is set to 1 when a parity error is present in
the next data read from SCFRDR