SMSC LAN9311 Manual De Usuario

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
171
Revision 1.4 (08-19-08)
DATASHEET
 
13Ch
1588_SRC_UUID_LO_TX_CAPTURE_2
Port 2 1588 Source UUID Low-DWORD Transmit Capture 
Register, 
140h
1588_CLOCK_HI_RX_CAPTURE_MII
Port 0 1588 Clock High-DWORD Receive Capture 
Register, 
144h
1588_CLOCK_LO_RX_CAPTURE_MII
Port 0 1588 Clock Low-DWORD Receive Capture Register, 
148h
1588_SEQ_ID_SRC_UUID_HI_RX_CAPTURE_MII
Port 0 1588 Sequence ID, Source UUID High-WORD 
Receive Capture Register
14Ch
1588_SRC_UUID_LO_RX_CAPTURE_MII
Port 0 1588 Source UUID Low-DWORD Receive Capture 
Register, 
150h
1588_CLOCK_HI_TX_CAPTURE_MII
Port 0 1588 Clock High-DWORD Transmit Capture 
Register, 
154h
1588_CLOCK_LO_TX_CAPTURE_MII
Port 0 1588 Clock Low-DWORD Transmit Capture 
Register, 
158h
1588_SEQ_ID_SRC_UUID_HI_TX_CAPTURE_MII
Port 0 1588 Sequence ID, Source UUID High-WORD 
Transmit Capture Register
15Ch
1588_SRC_UUID_LO_TX_CAPTURE_MII
Port 0 1588 Source UUID Low-DWORD Transmit Capture 
Register, 
160h
1588_CLOCK_HI_CAPTURE_GPIO_8
GPIO 8 1588 Clock High-DWORD Capture Register, 
164h
1588_CLOCK_LO_CAPTURE_GPIO_8
GPIO 8 1588 Clock Low-DWORD Capture Register, 
168h
1588_CLOCK_HI_CAPTURE_GPIO_9
GPIO 9 1588 Clock High-DWORD Capture Register, 
16Ch
1588_CLOCK_LO_CAPTURE_GPIO_9
GPIO 9 1588 Clock Low-DWORD Capture Register, 
170h
1588_CLOCK_HI
1588 Clock High-DWORD Register
174h
1588_CLOCK_LO
1588 Clock Low-DWORD Register
178h
1588_CLOCK_ADDEND
1588 Clock Addend Register, 
17Ch
1588_CLOCK_TARGET_HI
1588 Clock Target High-DWORD Register, 
180h
1588_CLOCK_TARGET_LO
1588 Clock Target Low-DWORD Register, 
184h
1588_CLOCK_TARGET_RELOAD_HI
1588 Clock Target Reload High-DWORD Register, 
188h
1588_CLOCK_TARGET_RELOAD_LO
1588 Clock Target Reload/Add Low-DWORD Register, 
18Ch
1588_AUX_MAC_HI
1588 Auxiliary MAC Address High-WORD Register, 
190h
1588_AUX_MAC_LO
1588 Auxiliary MAC Address Low-DWORD Register, 
 
194h
1588_CONFIG
1588 Configuration Register
198h
1588_INT_STS_EN
1588 Interrupt Status Enable Register, 
19Ch
1588_CMD
1588 Command Register, 
Table 14.1  System Control and Status Registers (continued) 
ADDRESS 
OFFSET
SYMBOL
REGISTER NAME