SMSC LAN9311 Manual De Usuario

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

445

Revision 1.4 (08-19-08)

 

Measured at line side of transformer, line replaced by 100

Ω (+/- 1%) resistor.

Offset from 16nS pulse width at 50% of pulse peak.

Measured differentially.

Min/max voltages guaranteed as measured with 100

Ω resistive load.

This section details the various AC timing specifications of the LAN9311/LAN9311i.

The I

2

C timing adheres to the Philips I

. Refer to the Philips I

 for detailed I

2

C timing information.

Output timing specifications assume the 25pF equivalent test load illustrated in 

 below.

Overshoot and Undershoot

V

OS

-

-

5

%

Jitter

1.4

nS

Transmitter Peak Differential Output Voltage

V

OUT

2.2

2.5

2.8

V

Receiver Differential Squelch Threshold

V

DS

300

420

585

mV

25 pF

OUTPUT