Motorola once sc140 Manual De Usuario

5

32-bits of the flag variable’s address are used. Thus, EDCA1_MASK is set to 0xffffffff, meaning all 
address bits will be compared.

The C code to start the stopwatch timer is shown in Code 2.

#include “EOnCE_registers.h”

void EOnCE_stopwatch_timer_start()
{
    WRITE_IOREG(ECNT_VAL,MAX_32_BIT);

/* Countdown will start at (2**32)-1 */

    WRITE_IOREG(ECNT_EXT,0);    

/* Extension will count up from zero */

    WRITE_IOREG(ECNT_CTRL,0x12c); 

/* Counting will be triggered by detection on EDCA1 */

    EOnCE_stopwatch_timer_flag = 0; 

/* This write to the flag triggers the counter */

}

Before triggering the stopwatch timer, it is necessary to initialize the counter registers. Initializing the 
event counter requires set up of the following three 32-bit registers:

•

Event counter value register (ECNT_VAL)

•

Extension counter value register (ECNT_EXT) 

•

Event counter control register (ECNT_CTRL)

Once these initializations are complete, the C code triggers the stopwatch timer and cycle counting 
commences. 

This section describes the initialization of the event counter registers. The register, ECNT_CTRL, controls 
the behavior of the event counter. The fields of the ECNT_CTRL register are shown in Figure 3.

Table 2 describes the settings of these fields in the stopwatch timer implementation.

EXT

1

Event counter operates as a 64-bit counter

ECNTEN

0010

The event counter is disabled, and will be enabled when an event is detected 
by EDCA1

ECNTWHAT

1100

The counter will advance on each core clock cycle