Getac Technology Corporation V110GD Manual De Usuario

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PIC32MX1XX/2XX
DS61168C
-page 54
Prelimina
ry
©
 2011 Microchip T
echnolo
gy Inc.
 
TABLE 4-12:
DMA CHANNELS 0-3 REGISTER MAP
(1)
V
irtual Address
(BF88_#
)
Regis
ter
Na
m
e
Bit Range
Bits
All
 R
e
set
s
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
3060 DCH0CON
31:16
0000
15:0 CHBUSY
CHCHNS
CHEN
CHAED
CHCHN
CHAEN
CHEDET
CHPRI<1:0>
0000
3070 DCH0ECON
31:16
CHAIRQ<7:0>
00FF
15:0
CHSIRQ<7:0>
CFORCE CABORT
PATEN
SIRQEN
AIRQEN
FF00
3080 DCH0INT
31:16
CHSDIE
CHSHIE
CHDDIE
CHDHIE
CHBCIE
CHCCIE
CHTAIE
CHERIE 0000
15:0
CHSDIF
CHSHIF
CHDDIF
CHDHIF
CHBCIF
CHCCIF
CHTAIF
CHERIF 0000
3090 DCH0SSA
31:16
CHSSA<31:0>
0000
15:0
0000
30A0 DCH0DSA
31:16
CHDSA<31:0>
0000
15:0
0000
30B0 DCH0SSIZ
31:16
0000
15:0
CHSSIZ<15:0>
0000
30C0 DCH0DSIZ
31:16
0000
15:0
CHDSIZ<15:0>
0000
30D0 DCH0SPTR
31:16
0000
15:0
CHSPTR<15:0>
0000
30E0 DCH0DPTR
31:16
0000
15:0
CHDPTR<15:0>
0000
30F0 DCH0CSIZ
31:16
0000
15:0
CHCSIZ<15:0>
0000
3100 DCH0CPTR
31:16
0000
15:0
CHCPTR<15:0>
0000
3110 DCH0DAT
31:16
0000
15:0
CHPDAT<7:0>
0000
3120 DCH1CON
31:16
0000
15:0 CHBUSY
CHCHNS
CHEN
CHAED
CHCHN
CHAEN
CHEDET
CHPRI<1:0>
0000
3130 DCH1ECON
31:16
CHAIRQ<7:0>
00FF
15:0
CHSIRQ<7:0>
CFORCE CABORT
PATEN
SIRQEN
AIRQEN
FF00
3140 DCH1INT
31:16
CHSDIE
CHSHIE
CHDDIE
CHDHIE
CHBCIE
CHCCIE
CHTAIE
CHERIE 0000
15:0
CHSDIF
CHSHIF
CHDDIF
CHDHIF
CHBCIF
CHCCIF
CHTAIF
CHERIF 0000
3150 DCH1SSA
31:16
CHSSA<31:0>
0000
15:0
0000
3160 DCH1DSA
31:16
CHDSA<31:0>
0000
15:0
0000
Legend:
x
 = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See 
 fo
more information.