Bourns TBU-SING,BI-DIR/TBU-CA025-100-WH/DFN/BOU TBU-CA025-100-WH Hoja De Datos
Los códigos de productos
TBU-CA025-100-WH
Specifi cations are subject to change without notice.
Customers should verify actual device performance in their specifi c applications.
TBU-CA Series - TBU
®
High-Speed Protectors
Product Dimensions
DIMENSIONS:
MM
(INCHES)
Recommended Pad Layout
TBU
®
High-Speed Protectors have a 100 % matte-tin termination
fi nish. For improved thermal dissipation, the recommended layout
uses PCB copper areas which extend beyond the exposed solder
pad. The exposed solder pads should be defi ned by a solder mask
which matches the pad layout of the TBU
uses PCB copper areas which extend beyond the exposed solder
pad. The exposed solder pads should be defi ned by a solder mask
which matches the pad layout of the TBU
®
device in size and spac-
ing. It is recommended that they should be the same dimension as
the TBU
the TBU
®
pads but if smaller solder pads are used, they should be
centered on the TBU
®
package terminal pads and not more than
0.10-0.12 mm (0.004-0.005 in.) smaller in overall width or length.
Solder pad areas should not be larger than the TBU
Solder pad areas should not be larger than the TBU
®
pad sizes
to ensure adequate clearance is maintained. The recommended
stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil
opening size 0.025 mm (0.0010 in.) less than the solder pad size.
Extended copper areas beyond the solder pad signifi cantly improve
the junction to ambient thermal resistance, resulting in operation
at lower junction temperatures with a corresponding benefi t of reli-
ability. All pads should soldered to the PCB, including pads marked
as NC or NU but no electrical connection should be made to these
pads. For minimum parasitic capacitance, it is recommended that
signal, ground or power signals are not routed beneath any pad.
stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil
opening size 0.025 mm (0.0010 in.) less than the solder pad size.
Extended copper areas beyond the solder pad signifi cantly improve
the junction to ambient thermal resistance, resulting in operation
at lower junction temperatures with a corresponding benefi t of reli-
ability. All pads should soldered to the PCB, including pads marked
as NC or NU but no electrical connection should be made to these
pads. For minimum parasitic capacitance, it is recommended that
signal, ground or power signals are not routed beneath any pad.
PIN 1 & BACKSIDE CHAMFER
4.00 ± 0.10
(.157 ± .004)
0.00 - 0.05
(.000 - .002)
6.50 ± 0.10
(.256 ± .004)
0.85 ± 0.05
(.033 ± .002)
0.30
(.012)
3.40
(.134)
0.30
(.012)
1.85
(.073)
0.70
(.028)
0.70
(.028)
0.80
(.031)
1.85
(.073)
C
PIN 1
0.25
(.010)
3
2
1
Pad #
Pin Out
1
Line In/Out
2
NU
3
Line Out/In
Pad Designation
Dark grey areas show added PCB copper area for better
thermal resistance.
thermal resistance.