Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 Hoja De Datos
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LAUNCHXL-TMS57004
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
Table 4-24. Interrupt Request Assignments (continued)
Modules
Interrupt Sources
Default VIM Interrupt
Channel
LIN
LIN level 1 interrupt
27
MIBADC
MIBADC sw group 2 interrupt
28
DCAN1
DCAN1 level 1 interrupt
29
SPI2
SPI2 level 1 interrupt
30
MIBADC
MIBADC magnitude compare interrupt
31
Reserved
Reserved
32-34
DCAN2
DCAN2 level 0 interrupt
35
Reserved
Reserved
36
SPI3
SPI3 level 0 interrupt
37
SPI3
SPI3 level 1 interrupt
38
Reserved
Reserved
39-41
DCAN2
DCAN2 level 1 interrupt
42
Reserved
Reserved
43-60
FMC
FSM_DONE interrupt
61
Reserved
Reserved
62-79
HWAG
HWA_INT_REQ_H
80
Reserved
Reserved
81
DCC
DCC done interrupt
82
Reserved
Reserved
83
eQEPINTn
eQEP Interrupt
84
PBIST
PBIST Done Interrupt
85
Reserved
Reserved
86-87
HWAG
HWA_INT_REQ_L
88
Reserved
Reserved
89-95
NOTE
Address location 0x00000000 in the VIM RAM is reserved for the phantom interrupt ISR
entry; therefore only request channels 0..94 can be used and are offset by 1 address in the
VIM RAM.
entry; therefore only request channels 0..94 can be used and are offset by 1 address in the
VIM RAM.
Copyright © 2012–2013, Texas Instruments Incorporated
System Information and Electrical Specifications
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