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Chapter 6 Parallel Input/Output Control
MC9S08DZ60 Series Data Sheet, Rev. 4
92
Freescale Semiconductor
6.5.1.5
Port A Drive Strength Selection Register (PTADS)
6.5.1.6
Port A Interrupt Status and Control Register (PTASC)
7
6
5
4
3
2
1
0
R
PTADS7
PTADS6
PTADS5
PTADS4
PTADS3
PTADS2
PTADS1
PTADS0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-7. Drive Strength Selection for Port A Register (PTADS)
Table 6-5. PTADS Register Field Descriptions
Field
Description
7:0
PTADS[7:0]
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port A bit n.
1 High output drive strength selected for port A bit n.
7
6
5
4
3
2
1
0
R
0
0
0
0
PTAIF
0
PTAIE
PTAMOD
W
PTAACK
Reset:
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-8. Port A Interrupt Status and Control Register (PTASC)
Table 6-6. PTASC Register Field Descriptions
Field
Description
3
PTAIF
Port A Interrupt Flag — PTAIF indicates when a port A interrupt is detected. Writes have no effect on PTAIF.
0 No port A interrupt detected.
1 Port A interrupt detected.
2
PTAACK
Port A Interrupt Acknowledge — Writing a 1 to PTAACK is part of the flag clearing mechanism. PTAACK
always reads as 0.
1
PTAIE
Port A Interrupt Enable — PTAIE determines whether a port A interrupt is requested.
0 Port A interrupt request not enabled.
1 Port A interrupt request enabled.
0
PTAMOD
Port A Detection Mode — PTAMOD (along with the PTAES bits) controls the detection mode of the port A
interrupt pins.
0 Port A pins detect edges only.
1 Port A pins detect both edges and levels.