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AT91SAM9M10-G45-EK
508
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
31.7.8.7
Slave Node Synchronization
The synchronization is done only in Slave node configuration. The procedure is based on time measurement
between falling edges of the Synch Field. The falling edges are available in distances of 2, 4, 6 and 8 bit times.
between falling edges of the Synch Field. The falling edges are available in distances of 2, 4, 6 and 8 bit times.
Figure 31-42.
Synch Field
).
When the start bit of the Synch Field is detected the counter is reset. Then during the next 8 Tbits of the Synch
Field, the counter is incremented. At the end of these 8 Tbits, the counter is stopped. At this moment, the 16 most
significant bits of the counter (value divided by 8) gives the new clock divider (CD) and the 3 least significant bits of
this value (the remainder) gives the new fractional part (FP).
Field, the counter is incremented. At the end of these 8 Tbits, the counter is stopped. At this moment, the 16 most
significant bits of the counter (value divided by 8) gives the new clock divider (CD) and the 3 least significant bits of
this value (the remainder) gives the new fractional part (FP).
When the Synch Field has been received, the clock divider (CD) and the fractional part (FP) are updated in the
Baud Rate Generator register (US_BRGR).
Baud Rate Generator register (US_BRGR).
Figure 31-43.
Slave Node Synchronization
The accuracy of the synchronization depends on several parameters:
• The nominal clock frequency (F
Nom
) (the theoretical slave node clock frequency)
• The Baudrate
• The oversampling (Over=0 => 16X or Over=0 => 8X)
The following formula is used to compute the deviation of the slave bit rate relative to the master bit rate after syn-
chronization (F
chronization (F
SLAVE
is the real slave node clock frequency).
Start
bit
Stop
bit
Synch Field
8 Tbit
2 Tbit
2 Tbit
2 Tbit
2 Tbit
RXD
Baud Rate
Clock
LINIDRX
Synchro Counter
000_0011_0001_0110_1101
US_BRGR
Clcok Divider (CD)
0000_0110_0010_1101
US_BRGR
Fractional Part (FP)
101
Initial CD
Initial FP
Reset
Start
Bit
1
0
1
0
1
0
1
0
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55
Baudrate_deviation
100
α
[
8
2
Over
–
(
) β
+
] Baudrate
×
×
×
8
F
SLAVE
×
--------------------------------------------------------------------------------------------
×
⎝
⎠
⎛
⎞ %
=
Baudrate_deviation
100
α
[
8
2
Over
–
(
) β
+
] Baudrate
×
×
×
8
F
TOL_UNSYNCH
100
---------------------------------------
⎝
⎠
⎛
⎞ xF
Nom
×
--------------------------------------------------------------------------------------------
×
⎝
⎠
⎜
⎟
⎜
⎟
⎜
⎟
⎛
⎞
%
=
0.5
–
α +0.5 -1 β +1
< <
≤ ≤