Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Hoja De Datos

 506

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field,
Synch Field and Identifier Field.

So in Master node configuration, the frame handling starts with the sending of the header.

The header is transmitted as soon as the identifier is written in the LIN Identifier register (US_LINIR). At this
moment the flag TXRDY falls.

The Break Field, the Synch Field and the Identifier Field are sent automatically one after the other.

The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the character 0x55 and the
Identifier corresponds to the character written in the LIN Identifier Register (US_LINIR). The Identifier parity bits
can be automatically computed and sent (see 

).

The flag TXRDY rises when the identifier character is transferred into the Shift Register of the transmitter.As soon
as the Synch Break Field is transmitted, the flag LINBK in the Channel Status register (US_CSR) is set to “1”. Like-
wise, as soon as the Identifier Field is sent, the flag LINID in the Channel Status register (US_CSR) is set to “1”.
These flags are reset by writing the bit RSTSTA at “1” in the Control register (US_CR).

Header Transmission

TXD

Baud Rate

 Clock

Start 

Bit

Write

US_LINIR

1

0

1

0

1

0

1

0

TXRDY

Stop

Bit

Start 

Bit

ID0

ID1

ID2

ID3

ID4

ID5

ID6

ID7

Break Field

13 dominant bits (at 0)

Stop

Bit

Break

Delimiter

1 recessive bit

(at 1)

Synch Byte = 0x55

US_LINIR

ID

LINID

in US_CSR

LINBK

in US_CSR

Write RSTSTA=1

in US_CR