Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

Notes: 1. If PB12 is used as PIO input in user applications, a low level must be ensured at startup to prevent Flash erase before 

the user application sets PB12 into PIO mode, 

2. In the product Datasheet Refer to: “Slow Clock Generator” of the “Supply Controller” section.

3. In the product Datasheet Refer to: “3 to 20 MHZ Crystal Oscillator” information in the “PMC” section.

The SWJ-DP pins are TCK/SWCLK, TMS/SWDIO, TDO/SWO, TDI and commonly provided on a standard 20-pin JTAG
connector defined by ARM. For more details about voltage reference and reset state, refer to 

At startup, SWJ-DP pins are configured in SWJ-DP mode to allow connection with debugging probe. Please refer to the
“Debug and Test” Section of the product datasheet.

SWJ-DP pins can be used as standard I/Os to provide users more general input/output pins when the debug port is not
needed in the end application. Mode selection between SWJ-DP mode (System IO mode) and general IO mode is
performed through the AHB Matrix Special Function Registers (MATRIX_SFR). Configuration of the pad for pull-up,
triggers, debouncing and glitch filters is possible regardless of the mode.

The JTAG pin and PA7 pin are used to select the JTAG Boundary Scan when asserted JTAGSEL at a high level and
PA7 at low level. It integrates a permanent pull-down resistor of about 15 k

Ω to GND, so that it can be left unconnected

for normal operations.

By default, the JTAG Debug Port is active. If the debugger host wants to switch to the Serial Wire Debug Port, it must
provide a dedicated JTAG sequence on TMS/SWDIO and TCK/SWCLK which disables the JTAG-DP and enables the
SW-DP. When the Serial Wire Debug Port is active, TDO/TRACESWO can be used for trace. 

The asynchronous TRACE output (TRACESWO) is multiplexed with TDO. So the asynchronous trace can only be used
with SW-DP, not JTAG-DP. For more information about SW-DP and JTAG-DP switching, please refer to the “Debug and
Test” Section.

The TST pin is used for JTAG Boundary Scan Manufacturing Test or Fast Flash programming mode of the SAM4S
series. The TST pin integrates a permanent pull-down resistor of about 15 k

Ω to GND, so that it can be left unconnected

for normal operations. To enter fast programming mode, see the Fast Flash Programming Interface (FFPI) section. For
more on the manufacturing and test mode, refer to the “Debug and Test” section of the product datasheet.

12

ERASE

PB12

Low Level at startup

In Matrix User Interface Registers

(Refer to the System I/O 

Configuration Register in the “Bus 

Matrix” section of the datasheet.)

10

DDM

PB10

-

11

DDP

PB11

-

7

TCK/SWCLK

PB7

-

6

TMS/SWDIO

PB6

-

5

TDO/TRACESWO

PB5

-

4

TDI

PB4

-

-

PA7

 XIN32

-

-

PA8

 XOUT32

-

-

PB9

 XIN

-

-

PB8

 XOUT

-