Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13



Tight integration of system peripherals reduces area and development costs



Thumb instruction set combines high code density with 32-bit performance



Code-patch ability for ROM system updates



Power control optimization of system components



Integrated sleep modes for low power consumption



Fast code execution permits slower processor clock or increases sleep mode time



Hardware division and fast digital-signal-processing oriented multiply accumulate



Saturating arithmetic for signal processing

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Deterministic, high-performance interrupt handling for time-critical applications



Memory Protection Unit (MPU) for safety-critical applications



Extensive debug and trace capabilities:



Serial Wire Debug and Serial Wire Trace reduce the number of pins required for debugging, tracing, and 
code profiling.

NVIC

Debug 

Access 

Port

Memory

Protection Unit

Serial 

Wire 

Viewer

Bus Matrix

Code 

Interface

SRAM and 

Peripheral Interface

Data 

Watchpoints

Flash
Patch

Cortex-M4 

Processor

Processor

Core