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ATSAM4S-XPLD
52
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
12.4.1.8 Program Status Register
Name:
PSR
Access: Read-write
Reset: 0x000000000
The Program Status Register (PSR) combines:
• Application Program Status Register (APSR)
• Interrupt Program Status Register (IPSR)
• Execution Program Status Register (EPSR).
These registers are mutually exclusive bitfields in the 32-bit PSR.
The PSR register accesses these registers individually or as a combination of any two or all three registers, using the register
name as an argument to the MSR or MRS instructions. For example:
name as an argument to the MSR or MRS instructions. For example:
• Read of all the registers using PSR with the MRS instruction
• Write to the APSR N, Z, C, V and Q bits using APSR_nzcvq with the MSR instruction.
The PSR combinations and attributes are:
Notes: 1. The processor ignores writes to the IPSR bits.
2. Reads of the EPSR bits return zero, and the processor ignores writes to these bits
See the instruction descriptions
31
30
29
28
27
26
25
24
N
Z
C
V
Q
ICI/IT
T
23
22
21
20
19
18
17
16
–
15
14
13
12
11
10
9
8
ICI/IT
–
ISR_NUMBER
7
6
5
4
3
2
1
0
ISR_NUMBER
Name
Access
Combination
PSR
Read-write
APSR, EPSR, and IPSR
IEPSR
Read-only
EPSR and IPSR
IAPSR
Read-write
APSR and IPSR
EAPSR
Read-write
APSR and EPSR