Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

To prevent any single software error that may corrupt SSC behavior, certain address spaces can be write-protected by
setting the WPEN bit in the 

If a write access to the protected registers is detected, then the WPVS flag in the SSC Write Protect Status Register
(US_WPSR) is set and the field WPVSRC indicates in which register the write access has been attempted.

The WPVS flag is reset by writing the SSC Write Protect Mode Register (SSC_WPMR) with the appropriate access key,
WPKEY.

The protected registers are:















SSC

RK

RF

RD

TD

TF

TK

SCLK

FSYNC

Data Out

Data in

CODEC

First

Time Slot

Serial Data Clock (SCLK)

Frame sync (FSYNC)

Serial Data Out

Serial Data in

CODEC

Second

Time Slot

First Time Slot

Second Time Slot

Dstart

Dend