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ATSAM4S-XPLD
573
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
31.9
Synchronous Serial Controller (SSC) User Interface
Table 31-5. Register Mapping
Offset
Register
Name
Access
Reset
0x0
Control Register
SSC_CR
Write-only
–
0x4
Clock Mode Register
SSC_CMR
Read-write
0x0
0x8
Reserved
–
–
–
0xC
Reserved
–
–
–
0x10
Receive Clock Mode Register
SSC_RCMR
Read-write
0x0
0x14
Receive Frame Mode Register
SSC_RFMR
Read-write
0x0
0x18
Transmit Clock Mode Register
SSC_TCMR
Read-write
0x0
0x1C
Transmit Frame Mode Register
SSC_TFMR
Read-write
0x0
0x20
Receive Holding Register
SSC_RHR
Read-only
0x0
0x24
Transmit Holding Register
SSC_THR
Write-only
–
0x28
Reserved
–
–
–
0x2C
Reserved
–
–
–
0x30
Receive Sync. Holding Register
SSC_RSHR
Read-only
0x0
0x34
Transmit Sync. Holding Register
SSC_TSHR
Read-write
0x0
0x38
Receive Compare 0 Register
SSC_RC0R
Read-write
0x0
0x3C
Receive Compare 1 Register
SSC_RC1R
Read-write
0x0
0x40
Status Register
SSC_SR
Read-only
0x000000CC
0x44
Interrupt Enable Register
SSC_IER
Write-only
–
0x48
Interrupt Disable Register
SSC_IDR
Write-only
–
0x4C
Interrupt Mask Register
SSC_IMR
Read-only
0x0
0xE4
Write Protect Mode Register
SSC_WPMR
Read-write
0x0
0xE8
Write Protect Status Register
SSC_WPSR
Read-only
0x0
0x50-0xFC
Reserved
–
–
–
0x100-0x128
Reserved for PDC registers.
–
–
–