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12.4.2.3 Behavior of Memory Accesses
The behavior of accesses to each region in the memory map is:
Note:
1.
See
The Code, SRAM, and external RAM regions can hold programs. However, ARM recommends that programs always use
the Code region. This is because the processor has separate buses that enable instruction fetches and data accesses to
occur simultaneously.
the Code region. This is because the processor has separate buses that enable instruction fetches and data accesses to
occur simultaneously.
The MPU can override the default memory access behavior described in this section. For more information, see
Additional Memory Access Constraints For Shared Memory
When a system includes shared memory, some memory regions have additional access constraints, and some regions
are subdivided, as
are subdivided, as
shows:
Table 12-4. Memory Access Behavior
Address Range
Memory Region
Memory
Type
Type
XN
Description
0x00000000 - 0x1FFFFFFF
Code
Normal
-
Executable region for program code. Data can also be
put here.
put here.
0x20000000 - 0x3FFFFFFF
SRAM
-
Executable region for data. Code can also be put here.
This region includes bit band and bit band alias areas,
see
see
0x40000000 - 0x5FFFFFFF
Peripheral
XN
This region includes bit band and bit band alias areas,
see
see
0x60000000 - 0x9FFFFFFF
External RAM
-
Executable region for data.
0xA0000000 - 0xDFFFFFFF
External device
XN
External Device memory
0xE0000000 - 0xE00FFFFF
Private Peripheral Bus
Strongly-
ordered
ordered
XN
This region includes the NVIC, System timer, and
system control block.
system control block.
0xE0100000 - 0xFFFFFFFF
Reserved
XN
Reserved
Table 12-5. Memory Region Shareability Policies
Address Range
Memory Region
Memory Type
Shareability
0x00000000-
0x1FFFFFFF
0x1FFFFFFF
Code
-
0x20000000-
0x3FFFFFFF
0x3FFFFFFF
SRAM
-
0x40000000-
0x5FFFFFFF
0x5FFFFFFF
-
0x60000000-
0x7FFFFFFF
0x7FFFFFFF
External RAM
-
0x80000000-
0x9FFFFFFF
0x9FFFFFFF