Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos
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ATSAM4S-XPLD
711
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
After the break condition, the transmitter returns the TXD line to 1 for a minimum of 12 bit times. Thus, the transmitter
ensures that the remote receiver detects correctly the end of break and the start of the next character. If the timeguard is
programmed with a value higher than 12, the TXD line is held high for the timeguard period.
ensures that the remote receiver detects correctly the end of break and the start of the next character. If the timeguard is
programmed with a value higher than 12, the TXD line is held high for the timeguard period.
After holding the TXD line for this period, the transmitter resumes normal operations.
illustrates the effect of both the Start Break (STTBRK) and Stop Break (STPBRK) commands on the TXD
line.
Figure 35-26.Break Transmission
35.7.3.14Receive Break
The receiver detects a break condition when all data, parity and stop bits are low. This corresponds to detecting a
framing error with data to 0x00, but FRAME remains low.
framing error with data to 0x00, but FRAME remains low.
When the low stop bit is detected, the receiver asserts the RXBRK bit in US_CSR. This bit may be cleared by writing the
Control Register (US_CR) with the bit RSTSTA to 1.
Control Register (US_CR) with the bit RSTSTA to 1.
An end of receive break is detected by a high level for at least 2/16 of a bit period in asynchronous operating mode or one
sample at high level in synchronous operating mode. The end of break detection also asserts the RXBRK bit.
sample at high level in synchronous operating mode. The end of break detection also asserts the RXBRK bit.
35.7.3.15Hardware Handshaking
The USART features a hardware handshaking out-of-band flow control. The RTS and CTS pins are used to connect with
the remote device, as shown in
the remote device, as shown in
.
Figure 35-27.Connection with a Remote Device for Hardware Handshaking
Setting the USART to operate with hardware handshaking is performed by writing the USART_MODE field in the Mode
Register (US_MR) to the value 0x2.
Register (US_MR) to the value 0x2.
The USART behavior when hardware handshaking is enabled is the same as the behavior in standard synchronous or
asynchronous mode, except that the receiver drives the RTS pin as described below and the level on the CTS pin
modifies the behavior of the transmitter as described below. Using this mode requires using the PDC channel for
reception. The transmitter can handle hardware handshaking in any case.
asynchronous mode, except that the receiver drives the RTS pin as described below and the level on the CTS pin
modifies the behavior of the transmitter as described below. Using this mode requires using the PDC channel for
reception. The transmitter can handle hardware handshaking in any case.
D0
D1
D2
D3
D4
D5
D6
D7
TXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
Write
US_CR
TXRDY
TXEMPTY
STPBRK = 1
STTBRK = 1
Break Transmission
End of Break
USART
TXD
CTS
Remote
Device
RXD
TXD
RXD
RTS
RTS
CTS