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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
When operating in ISO7816, either in T = 0 or T = 1 modes, the character format is fixed. The configuration is 8 data bits,
even parity and 1 or 2 stop bits, regardless of the values programmed in the CHRL, MODE9, PAR and CHMODE fields.
MSBF can be used to transmit LSB or MSB first. Parity Bit (PAR) can be used to transmit in normal or inverse mode.
Refer to 
The USART cannot operate concurrently in both receiver and transmitter modes as the communication is unidirectional
at a time. It has to be configured according to the required mode by enabling or disabling either the receiver or the
transmitter as desired. Enabling both the receiver and the transmitter at the same time in ISO7816 mode may lead to
unpredictable results.
The ISO7816 specification defines an inverse transmission format. Data bits of the character must be transmitted on the
I/O line at their negative value.
35.7.4.2 Protocol T = 0
In T = 0 protocol, a character is made up of one start bit, eight data bits, one parity bit and one guard time, which lasts
two bit times. The transmitter shifts out the bits and does not drive the I/O line during the guard time. 
If no parity error is detected, the I/O line remains to 1 during the guard time and the transmitter can continue with the
transmission of the next character, as shown in 
error bit is also named NACK, for Non Acknowledge. In this case, the character lasts 1 bit time more, as the guard time
length is the same and is added to the error bit time which lasts 1 bit time. 
When the USART is the receiver and it detects an error, it does not load the erroneous character in the Receive Holding
Register (US_RHR). It appropriately sets the PARE bit in the Status Register (US_SR) so that the software can handle
the error.
Figure 35-31.T = 0 Protocol without Parity Error 
Figure 35-32.T = 0 Protocol with Parity Error 
Receive Error Counter
The USART receiver also records the total number of errors. This can be read in the Number of Error (US_NER) register.
The NB_ERRORS field can record up to 255 errors. Reading US_NER automatically clears the NB_ERRORS field. 
Receive NACK Inhibit
The USART can also be configured to inhibit an error. This can be achieved by setting the INACK bit in the Mode
Register (US_MR). If INACK is to 1, no error signal is driven on the I/O line even if a parity bit is detected. 
Moreover, if INACK is set, the erroneous received character is stored in the Receive Holding Register, as if no error
occurred and the RXRDY bit does rise.
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Parity
Bit
Baud Rate
Clock
Start
Bit
Guard
Time 1
Next
Start
Bit
Guard
Time 2
D0
D1
D2
D3
D4
D5
D6
D7
I/O
Parity
Bit
Baud Rate
Clock
Start
Bit
Guard
Time 1
Start
Bit
Guard
Time 2
D0
D1
Error
Repetition