Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

On system reset, the vector table is fixed at address 0x00000000. Privileged software can write to the SCB_VTOR register
to relocate the vector table start address to a different memory location, in the range 0x00000080 to 0x3FFFFF80, see

As 

 shows, all exceptions have an associated priority, with:



A lower priority value indicating a higher priority



Configurable priorities for all exceptions except Reset, Hard fault and NMI.

If the software does not configure any priorities, then all exceptions with a configurable priority have a priority of 0. For
information about configuring exception priorities see 

, and 

Note:

Configurable priority values are in the range 0-15. This means that the Reset, Hard fault, and NMI exceptions, 
with fixed negative priority values, always have higher priority than any other exception.

For example, assigning a higher priority value to IRQ[0] and a lower priority value to IRQ[1] means that IRQ[1] has higher
priority than IRQ[0]. If both IRQ[1] and IRQ[0] are asserted, IRQ[1] is processed before IRQ[0].

If multiple pending exceptions have the same priority, the pending exception with the lowest exception number takes
precedence. For example, if both IRQ[0] and IRQ[1] are pending and have the same priority, then IRQ[0] is processed
before IRQ[1].

When the processor is executing an exception handler, the exception handler is preempted if a higher priority exception
occurs. If an exception occurs with the same priority as the exception being handled, the handler is not preempted,
irrespective of the exception number. However, the status of the new interrupt changes to pending.

To increase priority control in systems with interrupts, the NVIC supports priority grouping. This divides each interrupt
priority register entry into two fields:



An upper field that defines the group priority



A lower field that defines a subpriority within the group.

Only the group priority determines preemption of interrupt exceptions. When the processor is executing an interrupt
exception handler, another interrupt with the same group priority as the interrupt being handled does not preempt the
handler.

If multiple pending interrupts have the same group priority, the subpriority field determines the order in which they are
processed. If multiple pending interrupts have the same group priority and subpriority, the interrupt with the lowest IRQ
number is processed first.

Descriptions of exception handling use the following terms:

When the processor is executing an exception handler, an exception can preempt the exception handler if its priority is
higher than the priority of the exception being handled. See 

 for more information about

preemption by an interrupt.

When one exception preempts another, the exceptions are called nested exceptions. See 

 more

information. 

This occurs when the exception handler is completed, and:



There is no pending exception with sufficient priority to be serviced



The completed exception handler was not handling a late-arriving exception.