Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

For an asynchronous exception, other than reset, the processor can execute another instruction between when the
exception is triggered and when the processor enters the exception handler.

Privileged software can disable the exceptions that 

 shows as having configurable priority, see:





. 

For more information about hard faults, memory management faults, bus faults, and usage faults, see 

The processor handles exceptions using:



Interrupt Service Routines (ISRs)
Interrupts IRQ0 to IRQ34 are the exceptions handled by ISRs.



Fault Handlers
Hard fault, memory management fault, usage fault, bus fault are fault exceptions handled by the fault handlers.



System Handlers
NMI, PendSV, SVCall SysTick, and the fault exceptions are all system exceptions that are handled by system 
handlers.

The vector table contains the reset value of the stack pointer, and the start addresses, also called exception vectors, for
all exception handlers. 

 shows the order of the exception vectors in the vector table. The least-significant bit

of each vector must be 1, indicating that the exception handler is Thumb code. 

Initial SP value

Reset

Hard fault

NMI

Memory management fault

Usage fault

Bus fault

0x0000

0x0004

0x0008

0x000C

0x0010

0x0014

0x0018

Reserved

SVCall

PendSV

Reserved for Debug

SysTick

IRQ0

Reserved

0x002C

0x0038

0x003C

0x0040

Offset

Exception number

2

3

4

5

6

11

12

14

15

16

18

13

7

10

1

Vector

.
.
.

8

9

IRQ1

IRQ2

0x0044

IRQ239

17

0x0048

0x004C

255

.
.
.

.
.
.

0x03FC

IRQ number

-14

-13

-12

-11

-10

-5

-2

-1

0

2

1

239