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ATSAM4S-XPLD
722
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
35.7.8.6 Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register (US_RHR) and the RXRDY bit
in the Status Register (US_CSR) rises. If a character is completed while RXRDY is set, the OVRE (Overrun Error) bit is
set. The last character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
in the Status Register (US_CSR) rises. If a character is completed while RXRDY is set, the OVRE (Overrun Error) bit is
set. The last character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
To ensure correct behavior of the receiver in SPI Slave Mode, the master device sending the frame must ensure a
minimum delay of 1 Tbit between each character transmission. The receiver does not require a falling edge of the slave
select line (NSS) to initiate a character reception but only a low level. However, this low level must be present on the
slave select line (NSS) at least 1 Tbit before the first serial clock cycle corresponding to the MSB bit.
minimum delay of 1 Tbit between each character transmission. The receiver does not require a falling edge of the slave
select line (NSS) to initiate a character reception but only a low level. However, this low level must be present on the
slave select line (NSS) at least 1 Tbit before the first serial clock cycle corresponding to the MSB bit.
35.7.8.7 Receiver Timeout
Because the receiver baudrate clock is active only during data transfers in SPI Mode, a receiver timeout is impossible in
this mode, whatever the Time-out value is (field TO) in the Time-out Register (US_RTOR).
this mode, whatever the Time-out value is (field TO) in the Time-out Register (US_RTOR).
35.7.9 Test Modes
The USART can be programmed to operate in three different test modes. The internal loopback capability allows on-
board diagnostics. In the loopback mode the USART interface pins are disconnected or not and reconfigured for
loopback internally or externally.
board diagnostics. In the loopback mode the USART interface pins are disconnected or not and reconfigured for
loopback internally or externally.
35.7.9.1 Normal Mode
Normal mode connects the RXD pin on the receiver input and the transmitter output on the TXD pin.
Figure 35-40.Normal Mode Configuration
35.7.9.2 Automatic Echo Mode
Automatic echo mode allows bit-by-bit retransmission. When a bit is received on the RXD pin, it is sent to the TXD pin, as
shown in
shown in
. Programming the transmitter has no effect on the TXD pin. The RXD pin is still connected to the
receiver input, thus the receiver remains active.
Figure 35-41.Automatic Echo Mode Configuration
35.7.9.3 Local Loopback Mode
Local loopback mode connects the output of the transmitter directly to the input of the receiver, as shown in
.
The TXD and RXD pins are not used. The RXD pin has no effect on the receiver and the TXD pin is continuously driven
high, as in idle state.
high, as in idle state.
Receiver
Transmitter
RXD
TXD
Receiver
Transmitter
RXD
TXD