STMicroelectronics L6227 DMOS Evaluation Board EVAL6227PD EVAL6227PD Hoja De Datos
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EVAL6227PD
DocID9453 Rev 2
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L6227
Circuit description
32
5 Circuit
description
5.1
Power stages and charge pump
The L6227 device integrates two independent power MOS full bridges. Each power MOS
has an R
has an R
DS(ON)
= 0.73
(typical value at 25 °C), with intrinsic fast freewheeling diode.
Cross conduction protection is achieved using a deadtime (t
d
= 1
s typical) between the
switch off and switch on of two power MOS in one leg of a bridge.
Using N-channel power MOS for the upper transistors in the bridge requires a gate drive
voltage above the power supply voltage. The bootstrapped (V
voltage above the power supply voltage. The bootstrapped (V
BOOT
) supply is obtained
through an internal oscillator and few external components to realize a charge pump circuit
as shown in
as shown in
. The oscillator output (VCP) is a square wave at 600 kHz (typical) with
10 V amplitude. Recommended values/part numbers for the charge pump circuit are shown
in
in
.
Figure 5. Charge pump circuit
5.2 Logic
inputs
Pins IN1
A
, IN2
B
, IN1
B
and IN2
B
are TTL/CMOS compatible logic inputs. The internal
structure is shown in
. Typical value for turn-on and turn-off thresholds are
respectively V
thon
= 1.8 V and V
thoff
= 1.3 V.
Pins EN
A
and EN
B
have identical input structure with the exception that the drains of the
overcurrent and thermal protection MOSFETs (one for the bridge A and one for the
bridge B) are also connected to these pins. Due to these connections some care needs to
be taken in driving these pins. The EN
bridge B) are also connected to these pins. Due to these connections some care needs to
be taken in driving these pins. The EN
A
and EN
B
inputs may be driven in one of two
configurations as shown in
. If driven by an open drain (collector) structure,
Table 6. Charge pump external components values
Component
Value
C
BOOT
220 nF
C
P
10 nF
R
P
100
D1
1N4148
D2
1N4148
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